Samsung Display Co., Ltd.

Hoyong Jung

Suhyeong Park

Bonghyun You

Cheolwoo Park

Kyoungwon Lee

Heesoon Jeong

Jimyoung Seo

Hyundae Lee

Sangmi Kim

A display apparatus includes: a timing control block which outputs image data based on external image data and control signals, and generates data and gate-side control signals based on the external control signal; a source drive block which converts the image data into a data voltage based on the data control signal; a low frequency detection block which detects a low power drive period based on the external control signal and generates a power control signal, a state of which is determined based on a result of the detection; an integrated chip which receives first and second drive voltages and includes a first switch block that turns off a circuit of the source drive block based on the power control signal during the low power drive period; a gate drive circuit which generates a gate signal based on a gate control signal from the integrated chip; and a display panel.

Display apparatus

A data driver includes buffers, bias circuits, and a bias signal generator. The buffers respectively output data voltages corresponding to pixel image data. The bias circuits generate bias currents independent of each other and apply the bias currents to respective ones of the buffers. The bias signal generator generates a plurality of bias signals. Each of the bias circuits include a selector and a bias current generator. The selector selects one bias signal among the bias signals based on corresponding pixel image data and outputs the selected bias signal as a final bias signal. The bias current generator generates a corresponding bias current among the bias currents based on the final bias signal.

Data driver and method of driving the same

A display apparatus includes a display panel configured to display an image, a data driver including a voltage generator configured to convert an image data applied thereto to a data voltage and a buffer configured to apply the data voltage to the display panel, a timing controller including a mode controller configured to generate a mode selection signal on the basis of an image frame rate of the image data. The data driver is configured to be operated in a power cut-off mode or a stand-by mode in response to the mode selection signal. The driving voltage switch is configured to cut off the analog driving voltage applied to at least one of the buffer and the voltage generator during the power cut-off mode and the bias controller is configured to reduce a bias current in the stand-by mode.

Display apparatus having a data driver operated in a power cut-off mode or a stand-by mode

A data driver includes buffers respectively outputting data voltages corresponding to pixel image data, bias units corresponding to the buffers in a one-to-one correspondence and driving the buffers, respectively, and a global setting part applying control level values to the bias units. Each of the bias units includes a bias signal generating unit that selects one control level value among the control level values based on a corresponding pixel image data among the pixel image data and generates a bias signal having a control level corresponding to the selected control level value and a current generating unit that generates a corresponding bias current in response to the bias signal and applies the corresponding bias current to a corresponding buffer among the buffers.

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Seongnam-si, South Korea

Hoyong Jung