Raytheon Company

Hughes Aircraft Company

Hughes Electronics Corporation

Howard S Nussbaum

William P Posey

Steve I Hsu

Stephen D Taylor

Irwin L Newberg

Clifton Quan

Ernest C Chen

Gregory L Tangonan

Ronald I Wolfson

Gopal Raghavan

John J Wooldridge

Ralph E Hudson

Benjamin Felder

Joseph P Smalanskas

Oleg Brovko

Wade J Stone

Thomas A Kennedy

Jackson Chia

Kikuo Ichiroku

Mark I Landau

Douglas G DeWolf

Andrew A Walston

Loan T Davidoff

Joseph J Jensen

Jackson Y Chia

A processing-efficient chirp generator that allows flexibility in controlling phase, frequency and slope, i.e., rate of change of frequency. In one embodiment, a fine phase propagation block generates phase values in increments of the fine time step, each phase value also offset from other phase values by multiples of a coarse time step. The phase samples are realigned in time after conversion to digital-to-analog converter (DAC) values.

Flexible chirp generator

A low cost multi-channel thinned transmit/receive (TR) module architecture is provided. In one embodiment, the invention relates to an active antenna assembly including at least one multi-channel TR module for reducing power consumption, the antenna assembly including the at least one TR module including a first phase shifter, a first switch coupled to the first phase shifter, the first switch configured to switch between a transmit circuit and a receive circuit, the transmit circuit including a first power amplifier coupled to the first switch and to a plurality of second phase shifters, and a plurality of second power amplifiers, each second power amplifier coupled to one of the second phase shifters, the receive circuit including a low noise amplifier coupled to the first switch and to a plurality of third phase shifters, and a plurality of second switches, each second switch configured to switch between one of the second power amplifiers and one of the third phase shifters.

Multi-channel thinned TR module architecture

An efficient configurable signal filter. The filter includes a first mechanism for receiving a first signal of a first type and a second signal of a second type. A second mechanism selectively filters the first signal during a first mode of operation, and filters the second signal during a second mode of operation. A third mechanism generates control signals. A fourth mechanism automatically configures the second mechanism to operate in the first mode of operation or the second mode of operation based on the control signals. In a specific embodiment, the first type of signal is characterized by a first rate, and the second type of signal is characterized by a second rate. The first signal and the second signal are digital ADC outputs. The second mechanism includes plural filter blocks, each having one or more Multiply-Accumulate (MAC) pipes. Each of the one or more MAC pipes include one or more MAC blocks that are each associated with a coefficient memory data structure of a coefficient memory. The third mechanism or a user selects coefficients from each memory data structure to apply to each MAC block, thereby selectively affecting filter response. The control signals direct multiplexers or switches to configure the MAC pipes in a serial configuration or a parallel configuration corresponding to the first mode of operation or the second mode of operation, respectively.

Configurable filter and receiver incorporating same

A digital signal-rate converting system. The system includes a first mechanism for receiving a digital input signal characterized by a first rate. A second mechanism interleaves the digital input signal in accordance with a predetermined pattern to yield an adjusted-rate digital signal. The adjusted-rate digital signal is representative of the digital input signal, such as a bandpass signal. In a more specific embodiment, the digital signal-rate converting system is an input interface of a rate-converting Digital-to-Analog Converter (DAC). The rate-converting DAC includes a DAC module, such as multi-bit or a 1-bit DAC module, for receiving the adjusted-rate digital signal and providing an analog output signal with a desired bandwidth or center frequency in response thereto. In the specific embodiment, the adjusted-rate digital signal approximates the digital input signal and is characterized by a rate based on a desired center frequency of the analog output signal. In this embodiment, the DAC module includes a high-speed DAC characterized by a DAC hold rate that matches the rate of the adjusted-rate digital signal.

Digital signal-rate converter and systems incorporating same

A technique is described for providing a pulsed radar exciter signal, in a radar exciter including a direct digital synthesizer (DDS). The DDS is reset pulse-to-pulse to provide a pulsed DDS signal having pulse-to-pulse phase discontinuities due to the resetting of the DDS. The phase of the pulsed DDS signal can be shifted pulse-to-pulse by a phase shift that is held constant over a pulse to correct the pulse-to-pulse phasing of the DDS signal. A discrete phase modulator can provide the phase shift. The phase of the pulsed DDS signal can be shifted pulse-to-pulse by an additional phase shift which is a linear phase sequence from pulse-to-pulse, or by an additional phase shift which is a quadratic phase sequence from pulse-to-pulse to produce a ranging waveform.

DDS spur mitigation in a high performance radar exciter

Processing apparatus is provided that directly samples and quantizes a complex envelope of a bandlimited waveform centered at a predetermined carrier frequency. An oversampling delta-sigma modulator 1 samples and quantizes the input signal to a single bit data stream. A serial-to-parallel converter converts the single bit data stream into a parallel bit stream. A digital decimation filter digitally filters the parallel bit stream to produce an estimate of the baseband in-phase and quadrature components of the input signal. In-phase and quadrature video filters generate in-phase and quadrature samples that are output from the analog signal converter. A controller 26 and a plurality of digital-to-analog converters 25 are used to center noise shaping nulls of the delta-sigma modulator around the carrier frequency. The controller sets the spacing between nulls of the serial-to-parallel converter to maximize the signal-to-noise ratio of the analog signal. The controller controls the decimation filter to set the sample times of thereof to sample the carrier in quadrature so that the coefficients are programmed to form a bandpass filter at the carrier frequency and programs the coefficients of the video filters to form bandpass filters at the decimated carrier frequency.

Flexible and programmable delta-sigma analog signal converter

An adaptive signal processor (100) utilized with a receiving system (10) in a non-stationary environment having a receiver element (12) for receiving a composite signal comprised of a desire input signal and an interference signal. The invention includes a first mechanism (102) for modulating the composite signal to provide a plurality of modulated signals and to generate a plurality of synthetic channels (104). A second mechanism (126) is provided for calculating and applying a plurality of adaptive weight values to the modulated signals in the synthetic channels (104) to provide a plurality of time varying weighted signals. Finally, a third mechanism (128) is provided for combining the time varying weighted signals in the synthetic channels (104) to eliminate the interference signal from the composite signal. In a preferred embodiment, the composite signal is received by an antenna or hydrophone (12) and then digitized and stored in a memory (122). Stored digitized data is then modulated to provide modulated signals and a plurality of synthetic channels (104). Samples of the modulated signals are used as a basis to generate a plurality of adaptive weight values which are applied to the modulated signals to provide time varying weighted signals for tracking the non-stationary environment. The weighted signals are then summed to eliminate the interference signal from the composite signal.

Adaptive signal processor for non-stationary environments and method

A phase shifter using digital counters allows extremely accurate phase shifts. In a parallel circuit arrangement of a number of basic phase shift units, which each includes a dual modulus counter and phase control circuitry for controlling the counter modulus, the outputs of several units are combined in parallel. With the divider ratios of all the dividers of the units consisting of roots of pairwise relatively prime numbers, the total number of phase states is equal to the multiplication of its divider ratios.

Digital frequency divider phase shifter

Discrete phase modulation for modulating the transmit and receive radar signal waveforms in order to control distortion. The signal is modulated by discrete phases which change from pulse-to-pulse. A digital frequency division circuit accurately generates the modulation signals, and allows the discrete phases to be generated with precise accuracy. The discrete phase changes can be a quadratic phase progression for target Doppler and range detection.

Discrete phase modulator

A phase shifter that employs digital circuitry to achieve arbitrarily fine phase control of reference signals at frequencies extending to the Gigahertz region. The phase shifter includes a cascade of identical phase shift units that provide progressively finer phase control resolution over a full 360 degree range. The phase precision is set by the number of stages used.

Precision digital phase shifter

A precision digital phase shift element for achieving precise phase shift of an input pulse train signal. The output is a pulse train at a frequency equal to the input signal frequency divided by N, and having N equally spaced phase states. The relative phase state of the output signal is reliably controlled by selective deletion of pulses from the input signal pulse train. The selective deletion can be achieved by selectively gating the input pulse train, or by use of a dual modulus frequency divider circuit.

Precision digital phase shift element

A modulation is applied to a received radar signal prior to analog-to-digital (A/D) conversion, and is removed subsequent to A/D conversion, to mitigate the effects of nonlinear receiver harmonic distortions and receiver spurious responses. The received target and clutter signals pass unchanged through the receiver to the digital signal processing. Harmonic distortion products and spurious responses introduced in the receiver after the modulation has been applied are distorted by the demodulation signal. By proper selection of the modulation waveform, coherent harmonic distortion products and spurious responses are converted to wideband noise reducing the level of interference that competes with targets in the affected Doppler filters.

System and method for radar receiver harmonic distortion and spurious

An inverse synthetic array radar (ISAR) system provides for improving the resolution of an ISAR image by providing compensation for non-uniformity in the magnitude of the angular velocity of a rotating target as the target rotates to generate the synthetic-aperture-angle, and enables use of a larger synthetic-aperture angle, without compromising ISAR image quality with respect to smear. The preferred embodiment records sampled data signals to generate a collected-data matrix indexed in each of two dimensions on the basis of uniform increments of time, and performs data processing to produce a translated data matrix indexed in a dimension on the basis of uniform increments of synthetic-aperture angle. Further processing of the translated data matrix produces data in a buffer for controlling a display device for the ISAR image.

Inverse synthetic array radar system and method

An apparatus and method for frequency translation of true time delay signals in a phased array radar system is provided. A local oscillator signal is true time delayed or modulo 2.pi. phase shifted and then mixed with a true time delay beamsteering signal from a true time delay circuit to produce a frequency translated transmit signal which is supplied to an antenna element. A receive signal received by an antenna element is mixed with a true time delayed or modulo 2.pi. phase shifted local oscillator signal to provide a frequency translated receive signal. The frequency translated receive signal can then be passed through a true time delay circuit and other subsequent processing circuitry. The frequency translation permits higher frequency transmit and receive signals to be used with lower frequency true time delay devices.

Frequency translation of true time delay signals

A system and method that provides for all-weather precision guidance of conventional air-to-surface weapons. The system and method employs a coherent monopulse radar disposed on a launch platform and a noncoherent passive (receive only) radar disposed on the weapon. The synthetic aperture radar generates a synthetic aperture radar monopulse map of an area around the target. The radar is used designate the location of the target, and transmit a sequence of alternating sum and simultaneous azimuth and elevation difference patterns centered on the target. The weapon includes a guidance system and seeker that is responsive to guidance commands transmitted by the synthetic aperture radar. The guidance system and seeker receives reflections of the alternating sum and combined azimuth and elevation difference pattern from the target, and the sum pulse is used by the weapon to acquire and track the azimuth and elevation difference pattern null on the target to fly an optimum trajectory to the target. One method for guiding a weapon to a target comprises the following steps. A synthetic aperture radar is used to generate a SAR monopulse map of a target area and designate a target therein. The weapon is then launched toward the target. The radar is used to transmit an interleaved sum and simultaneous azimuth and elevation difference pattern guidance pulse train at the target. The reflected interleaved sum and simultaneous azimuth and elevation difference pattern is received from the target at a seeker and guidance system on the weapon. The sum pattern is used by the weapon to lock onto the converging null, and is used by the launch platform to provide closed loop tracking of the target during guidance illumination. After weapon null lock-on, steering commands are generated to cause the weapon to fly an optimum trajectory to the target.

Growing community of inventors

Los Angeles, CA, United States of America

Howard S Nussbaum