Texas Instruments Corporation

Intervoice, Inc.

Howard S Barnett

Michael J Cochran

Ellis K Cave

Michael J Polcyn

Sid Poland

There is disclosed a method and system for determining the progress of a calling connection. The system measures the peak voltage of the signals on the line and derives a ratio of these peak signals to the average value of the signal. From this ratio a determination is made as to the calling condition of the line.

Call progress detection circuitry and method

A high speed computer system has a high speed processor for executing program sequences in a single fetch cycle; an instruction memory means for communicating with the high speed processor; a data memory for communicating with the high speed processor and a special subroutine handling operation which is implemented through a picosequencer which provides for interrupting the program, loading the contents of the instructions being implemented into a memory, executing the subroutine under the control of a picosequencer and then returning to the operation of the program.

Data processor using picosquencer to control execution of

A high speed data processor obtains its speed through the efficient transfer of information over separate data and instruction busses, prefetching of instructions, dual working memory and architectural arrangements designed for maximum information transfer. The architecture of the data processor is such that data from any of several sources may be, either in combination or separately, channelled directly through an Arithmetic Logic Unit (ALU) so as to provide quick manipulation of the data since no extra iterations are needed in this movement. The processor uses two scratch pad or working memory areas. Both scratch pad memories communicate directly with the ALU so as to provide two operands, one from each memory and for the operation of the ALU. Two independent registers are provided which allow the linkage of computer words to obtain longer words thereby and a resulting higher precision. This linkage is accomplished by mapping and carrying the most significant bit over to the next sequentially mapped word. The invention also involves the use of a third independent register which may be directly channelled through the Arithmetic Logic Unit to set a memory address at a preselected value. This independent register is particularly useful in a real time mode of operation when the memory in the scratch pads must be dumped or temporarily stored in a non-volatile memory so as to erase the scratch pad memory permitting a higher priority task to utilize it.

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Dallas, TX, United States of America

Howard S Barnett