Qualcomm Incorporated

Houtan Dehesh

Todd Robert Sutton

Juan Faus

Jan Krzys Wegrzyn

Roy G Moss

Kuo-Chun Lee

David T Clapp

Lindsay A Weaver, Jr

Franklin Peter Antonio

Farrokh Khatibi

Walid M Hamdy

Kendrick H Yuen

Eric L Henderson

Douglas A Robbins

Richard Larson

A loopback processing method includes detecting a loopback at a first entity in a wide area network. The detection is accomplished by recognizing that a 'memorized' frame has returned on the same communications interface within a given period of time. The time interval between sending the frame and detecting it returning at the same port may be recorded and sent to an operator to provide information on the relative location of the loopback in the network. A loopback detect sequence is sent from the first entity to a second entity on the communications interface in loopback. Because of the loopback, both entities receive the loopback detect sequence.

Loopback processing method and apparatus

A loopback processing method includes detecting a loopback at a first entity in a wide area network. The detection is accomplished by recognizing that a &ldquo;memorized&rdquo; frame has returned on the same communications interface within a given period of time. The time interval between sending the frame and detecting it returning at the same port may be recorded and sent to an operator to provide information on the relative location of the loopback in the network. A loopback detect sequence is sent from the first entity to a second entity on the communications interface in loopback. Because of the loopback, both entities receive the loopback detect sequence. Either or both entities may inform a network operator of the loopback. The first entity has stopped using the link in loopback for real data, instead sending the loopback detect sequence. The second entity, upon detecting the loopback detect sequence, also stops using the link for real data. When the first entity stops detecting the loopback detect sequence returning on the link, the first entity stops sending the loopback detect sequence and begins using the link for real data again. When the second entity stops receiving the loopback detect sequence on the link, the second entity begins using the link for real data again. Either or both entities may inform a network operator that the loopback is gone.

A base station architecture splits modem functionality into modulator and demodulator entities, each configured to handle multiple telephone calls. A high-speed digital bus with associated routing elements connects multiple-channel (i.e., multiuser) modulator and demodulator elements. The modulator and demodulator elements may be physically separated, residing on different cards, and even different shelves, within the base station. During softer handoff between forward channels of the base station, multiple modulator elements use the address of a demodulator element in communication with a mobile subscriber unit. A base station controller broadcasts forward-link frames to all modulator elements. The multiple modulator elements simultaneously receive forward-link frames from the base station controller. The multiple modulator elements filter these forward-link frames and accept only those to be transmitted to the particular mobile subscriber unit in communication with the demodulator element.

Softer handoff in a base station employing virtual channel elements

A method and apparatus for distributing and consolidating data packets onto multiple network interfaces includes using frame-based inverse multiplexing to parse high-speed data into frames for placement onto lower-speed E1 or T1 connections between a base station controller and a base station, or between two base station controllers, in a cellular telephony network. The inverse multiplexing algorithm may be implemented with hardware such as, e.g., FIFOs and registers. The frames are transmitted across the E1 or T1 connections and then received, buffered, and multiplexed into a single high-speed data stream.

Method and apparatus for distributing and consolidating data packets

A packet switching architecture provides for a switch system comprised of a cellular base station in communication with the PSTN through a switch. Data packets are routed through the switch system as necessary to effect communication between the public switched telephone network (PSTN) and mobile radiotelephones disposed within the cellular coverage area surrounding the base station. A packet interconnection subsystem operates to transfer data packets between a plurality of interface ports, to which are coupled a corresponding plurality of signal lines. Within the interconnection subsystem, one or more distribution/consolidation (DISCO) interface units are mutually coupled together through a central router unit. Each DISCO interface unit is configured to consolidate the data packets received through at least two signal ports onto a consolidation bus, as well as to distribute the addressed data packets from a distribution bus to two or more of ports. In a preferred implementation, the interconnection subsystem is realized so as to efficiently provide redundancy among the interface units within the interconnection network.

Method and apparatus for distribution/consolidation (DISCO) interface

A method and apparatus are provided for performing a Hadamard transform operation. The basic building block of the apparatus is an FHT engine having a difference circuit for subtracting the input symbol from a delayed processed symbol, first multiplexer for providing either the difference of the delayed processed symbol and the input symbol or the input symbol, a summing circuit for adding the input symbol to the delayed processed symbol and a second multiplexer for providing either the sum of the input and the delayed processed symbol or the delayed processed symbol as an output. This basic engine is designed to work in conjunction with a variety of different memory configurations. The engines can then be placed in series to perform a Hadamard transform of all defined orders. In addition, two methods of optimizing the use of memory resources are described. On involves the optimal configuration of the memory elements and the second involves truncation. Also, provided is a method and apparatus for performing the transform on samples provided as a serial bit stream to the apparatus.

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Encinitas, CA, United States of America

Houtan Dehesh