Idemia Identity & Security France

Houssem Maghrebi

Cyrille Pepin

Emmanuel Prouff

Guillaume Dabosville

Marc Brugnon

Ahmadou Sere

David Daille-Lefevre

Raphaël Geslain

Deny Carhuel

Fadi Osman

Alexis Bailly

Ahmadou Serre

David Daille-levefre

Challenge-response authentication process of a secure element (SE) in a micro controller unit (MCU) devoid of a random number generator. The process includes the following steps conducted by the micro controller unit (MCU): receipt of at least one random datum (T, IDX) generated randomly by the secure element (SE), generation of a challenge datum (Z) specific to the micro controller unit (MCU) from the received random datum (T, IDX), sending of the generated challenge datum (Z) to the secure element (SE), receipt of a response datum (R) generated by the secure element (SE) as a function of the challenge datum (Z), and determination of an authentication result as a function of the received response datum.

Process for challenge response authentication of a secure element (SE) in a micro controller unit

The present invention relates to a method for encryption or decryption of a data block from a secret key, wherein the method comprises: generating a first round key kdependent on the secret key, selecting each of a first mask (&#x2212;b) and a second mask (&#x2212;b) in a set consisting of a mask of bits all at one and a mask of all zero bits, calculating a first masked key k' from the first round key kand the first mask (&#x2212;b) as follows:&#x2295;(&#x2212;)wherein &#x2295; is an exclusive disjunction, executing a first encryption round applied to two first data dependent on the data block, by means of the first masked round key k&#x2032; so as to produce two second data, after producing the first masked key k&#x2032;, generating a second round key kdependent on the secret key, calculating a second masked key k&#x2032; from the second round key kand the second mask (&#x2212;b) as follows: k&#x2032;=k&#x2295;(&#x2212;b), calculating two third data L, Ras follows:&#x2295;(&#x2212;)&#x2295;(&#x2212;)&#x2295;(&#x2212;)&#x2295;(&#x2212;)and executing a second encryption round following the first encryption round, wherein the second encryption round is applied to the two third data L, Rby means of the second masked round key k&#x2032;.

Encryption/description method protected against side-channel attacks

The present invention relates to a method for symmetrical encryption or decryption of a data block from a secret key (K), the method comprising steps of:

Method for symmetric block encryption or decryption

The invention relates to a method for obtaining a program intended to be executed by an electronic device (), such as a smart card, comprising a non-volatile memory, the process comprising the insertion (E, E), in a source code, of a first function at the start of a source code instruction block, and a second function at the end of the source code instruction block, then generation (E) of the executable program from the source code, wherein the first function is configured to disable a wear-reduction mechanism of the non-volatile memory, when the program is executed by the electronic device, and the second function is configured to enable the wear-reduction mechanism of the non-volatile memory, when the program is executed by the electronic device.

Method of obtaining a program to be executed by a electronic device, such as a smart card, comprising a non-volatile memory

A method for protecting an electronic device executing a program against fault injection and type confusion attacks likely to affect a variable (Z) intended to be used by the program. The method includes calculating integrity check data (X, Y) of variable (Z), dependent on a type (T) of the variable (Z), and a value (V) of the variable (Z) stored in an execution stack (P1) and/or of a first addressing datum (A) stored in a first index register (ind). The first addressing datum (A) adapted to locate the value (V) stored in the execution stack (storing the integrity check data (X, Y) on the variable (Z) in at least one control stack (P, P) different to the execution stack (P). Storing in a second index register (ind), a unique second addressing datum (A) adapted to locate the integrity check data (X, Y) in the or each control stack (P, P).

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Issy-les-Moulineaux, France

Houssem Maghrebi