United Microelectronics Corp.

Houshang Aghahassan

Tsung-Chien Wu

Albert Kuo Huei Yen

Chung-Che Reed

A layout of a power device is provided. The layout includes a substrate, a unit array, a plurality of first, second, third and fourth signal paths, and a first, second, third and fourth port. The unit array with a plurality of rows is disposed on the substrate. Each row of the unit array includes a plurality of units. The first and second signal paths on the substrate are disposed on a first side and a second side of corresponding odd-numbered rows of the unit array. The third and the fourth signal paths on the substrate are disposed above a corresponding row of the unit array. The first to fourth ports on the substrate are electrically connected to the first to fourth signal paths respectively.

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Cupertino, CA, United States of America

Houshang Aghahassan