Realtek Semiconductor Inc.

Realtek Semiconductur Corp.

Hou-Wei Lin

Kuang-Yu Yen

Shieh-Hsing Kuo

Meng-Han Hsieh

Yi-Lin Li

Chia-Chun Hung

Yi-Cheng Chen

Chi-Shun Weng

Liang-Hui Li

Yi-Chang Shih

Chien-Liang Tsai

Yong Liu

Cheng-Yi Huang

Wei-Hung He

Chun-Ming Cho

Yu-Hsuan Liu

Shi-Meng Zou

Cheng-Kang Wang

Jung-Tang Chiang

Jung-Feng Ho

Wei-Feng Mao

Chen-Hsing Lo

Ying-Tsung Lin

Chin-Chiu Li

Chun-Xia Guo

Yi-chang Shih

An earphone case for storing and charging Bluetooth (BT) earphones includes: an earphone container for accommodating a pair of BT earphones; a BT circuit for communicating with the pair of BT earphones through BT communication after the pair of BT earphones is taken out; a microphone for receiving outside sound to generate a microphone signal after the pair of BT earphones is taken out; an audio circuit for generating an audio signal according to the microphone signal and providing the audio signal for the pair of BT earphones through the BT circuit in a predetermined mode; a user interface for generating a control signal according to user control after the pair of BT earphones is taken out, and providing the control signal for the pair of BT earphones through the BT circuit; and a control circuit for controlling the interaction between the earphone case and the pair of BT earphones.

Bluetooth earphone system, and earphone case for storing and charging Bluetooth earphones

A wireless device includes a radio-frequency module, a modem module, and a control unit. The radio-frequency module and the modem module operate either in a first operation mode or in a second operation mode. The control unit, coupled to the RF and the modem module, generates a control signal to indicate to the RF and the modem module to operate in the first operation mode or to operate in the second operation mode. A first set of signal formats corresponding to the first operation mode is a superset of a second set of signal formats corresponding to the second operation mode, and a first power consumption corresponding to the first operation mode is higher than a second power consumption corresponding to the second operation mode.

Radio-frequency module and wireless device

A wireless communication system and related wireless devices are disclosed. The wireless communication system includes: a source wireless device configured to operably insert an auto-pairing request and one or more source Bluetooth device addresses into one or more predetermined advertising packets to form one or more target advertising packets, and configured to operably transmit the target advertising packets; and a destination wireless device configured to operably receive and parser the target advertising packets to extract the auto-pairing request and the one or more source Bluetooth device addresses. The destination wireless device performs an auto-pairing procedure with the source wireless device according to the auto-pairing request and the one or more source Bluetooth device addresses to establish a Bluetooth bond with the source wireless device. Each of the predetermined advertising packets is an advertising indication (ADV_IND) packet, a non-connectable advertising indication (ADV_NONCONN_IND) packet, or a discoverable advertisement indication (ADV_DISCOVER_IND) packet.

Wireless communication system and related wireless device

An equalizer and an equalizing method for equalizing a received signal, where the received signal includes at least one primary interference and a plurality of secondary interferences. The Viterbi equalizer includes a filter module for filtering out the secondary interferences from the received signal to generate a filtered signal, a serial to parallel converter, coupled to the filter module, for generating a plurality of sequences according to the filtered signal, and a Viterbi equalizing module, coupled to the serial to parallel converter, for respectively equalizing the plurality of sequences to generate a plurality of equalized sequences. The architecture of the Viterbi equalizing module is greatly simplified thereby reducing the calculation activity of the Viterbi equalizer as well as maintaining its efficiency.

Equalizer and equalizing method thereof

A parity-check-code decoder is adapted for receiving a channel quality ratio and at least (N) bits that are to be decoded. The parity-check-code decoder treats each of the bits as a bit node, and includes: a verifying circuit that multiplies (N) bit nodes by a matrix to obtain (N-K) check nodes; a reliability-generating circuit that generates a reliability index that serves as an extrinsic check index for each of the bit nodes to transmit to the check nodes; a bit exchange circuit that generates an extrinsic bit index for each of the check nodes to transmit to the bit nodes; a check-exchange circuit that updates a plurality of the extrinsic check indices based on the extrinsic bit indices for the bit nodes to transmit to the check nodes; and a reliability-updating circuit that updates the reliability index of and determines an updated value for each of the bit nodes.

Parity-check-code decoder and receiving system

An apparatus for performing channel estimation includes a time-domain estimating circuit to perform a channel estimation on a time-domain received signal to output a time-domain estimated signal, a second frequency-domain converting circuit to convert the time-domain estimated signal into a frequency-domain estimated signal, an error computing circuit to produce an error signal based on the frequency-domain estimated signal and a frequency-domain received signal, and a compensation circuit to compensate the frequency-domain estimated signal using the error signal so as to produce a final channel estimation signal. The apparatus is located in a receiving device that includes a first frequency-domain converting circuit to convert the time-domain received signal into the frequency-domain received signal, and an equalizer to generate a frequency-domain recovered signal based on the frequency-domain received signal and the final channel estimation signal.

Apparatus for performing channel estimation in a receiving device

A single-carrier/multi-carrier community receiver includes a discrete Fourier transform unit, a frequency-domain equalizer, an inverse discrete Fourier transform unit and an inter-symbol interference (ISI) cancellation unit. The discrete Fourier transform unit is utilized for executing a discrete Fourier transform upon a received signal to generate a frequency-domain signal. The frequency-domain equalizer is utilized for executing an equalization operation upon the frequency-domain signal to generate a frequency-domain equalized signal. The inverse discrete Fourier transform unit is utilized for executing an inverse discrete Fourier transform upon the frequency-domain equalized signal to generate a time-domain equalized signal. The ISI cancellation unit is utilized for executing an ISI cancellation operation upon the time-domain equalized signal to generate an ISI-cancelled signal.

Single-carrier/multi-carrier community receiver and related signal processing method

The invention provides a method for testing a transmission medium used in a full-duplex communication system comprising an endpoint that comprises a transmitting end (TX) and a receiving end (RX); the method comprises the steps of: first, transmitting a transmitted signal which comprises a test signal sequence with a high auto-correlation characteristic; then, receiving a received signal, and performing a correlation operation on the test signal and the received signal; finally, according to the result of the correlation operation, determining the impedance matching condition of the transmission medium.

Transmission medium testing apparatus and method

A quadrature amplitude modulation trellis coded modulation (QAM-TCM) decoding apparatus and the related method that receives and decodes a QAM signal. The QAM-TCM decoding apparatus includes an in-phase least significant bit (LSB) decoding path, which includes a in-phase Viterbi decoder for executing a decoding procedure on at least one LSB corresponding to an in-phase component of the QAM signal, a quadrature-phase LSB decoding path, which includes a quadrature-phase Viterbi decoder for executing a decoding procedure on at least one LSB corresponding to a quadrature-phase component of the QAM signal, and a most significant bit (MSB) decoding path for executing a decoding procedure on MSB portions corresponding to the in-phase or the quadrature-phase of the QAM signal.

Quadrature amplitude modulation trellis coded modulation decoding apparatus and method thereof

The present invention provides a method and apparatus for correcting symbol timing of a receiver. The receiver receives a signal transmitted by a transmitter based on a symbol period. The method includes: sampling the signal with a sampling period to generate N sampled data in series, wherein the sampling period is half the symbol period; from Kdata of the N sampled data, getting M data to serve as a first data set; performing a timing recovery algorithm upon the first data set to generate a first timing metric; from (K+1) data of the N sampled data, getting M data to serve as a second data set; performing the timing recovery algorithm upon the second data set to generate a second timing metric; and correcting the symbol timing according to the first and second timing metrics.

Method and apparatus for correcting symbol timing

The present invention provides a method and circuit for equalizing and compensating IQ imbalance at the same time. The method includes: down-converting an RF signal to generate a baseband signal, and driving an adaptive equalizer to process the baseband signal for achieving equalization and IQ imbalance compensation simultaneously.

Method and circuit for equalizing and compensating IQ imbalance simultaneously

The apparatus for communication channel estimation device of the present invention includes: a frequency response square computing circuit, to generate a first frequency response corresponding to a first frequency and a second frequency response corresponding to a second frequency according to a input signal, and to square the first and the second frequency response; and an estimating circuit, to estimate a channel length according to the squares of the first frequency and the second frequency response. Wherein the input signal is transmitted in a symbol rate and the first frequency and the second frequency are 1/M and 1/N times of the symbol rate respectively, wherein M and N are in the order of 2.

Ethernet channel estimation device and method

A signal processing device for processing a passband signal to generate an equalized signal includes a passband adaptive equalizer for generating the equalized signal according to the passband signal, including at least one feed-forward equalizer (FFE) and one feedback equalizer (FBE), and a multilevel quantizer coupled with the passband adaptive equalizer for selectively utilizing a single predetermined threshold or a plurality of multiple predetermined thresholds to quantize the equalized signal in order to generate a sliced signal.

Growing community of inventors

Taipei, Taiwan

Hou-Wei Lin