Lucent Technologies Inc.

At+t Corp.

Horng-Dar Lin

Vijay Pochampalli Kumar

Jay Henry O'Neill

Philippe Oechslin

Edward Joseph Ouellette, Iii

Kuo-Hua Lee

Chen-Hua D Yu

Ran-Hong Yan

Brian J Petryna

Gordana Pavlovic

Alexander Anesko

A method for determining the number of packets lost in a communications network. Marker packets are inserted before and after a predetermined number of packets in a data stream. The number of packets between the inserted marker packets are counted at two different points in the network. Each number of packets counted between the inserted marker packets at the two different points in the network are compared with one another to ascertain the number of packets lost between the two different points in the network.

Packet network interface

A programmable motion estimator having a memory and processing element array that implement a dual addressing scheme and a block rotating scheme that work together to perform block difference calculations required in video encoder subsystems to provide motion estimation with less processing power without comprising video quality.

Apparatus and method for a programmable video motion estimator

The present invention provides a method and apparatus for decoding data which has been encoded using high rate trellis codes, such as rate-k/n convolutional codes. The method of the present invention includes assigning code states to each of a plurality of decoder processing elements; scheduling computation of a plurality of new path metrics within the processing elements using previously-computed path metrics and branch metrics which vary with the encoded data; scheduling access for each of the processing elements to an appropriate set of the previously-computed metrics, such that each of the previously-computed metrics in the appropriate set is accessed in series by a given processing element in order to compute the new path metrics; and using a survivor sequence of path metrics computed in accordance with the scheduling steps to estimate the uncoded data. The path metrics may be efficiently reordered as they are computed to facilitate access thereto for subsequent path metric computation.

Method of reordering data

A packet switch interface, which may be an asynchronous transfer mode (ATM) layer interface chip, may be connected to the inputs or the outputs of a packet switch. The interface chip modifies the virtual path identifier and the virtual channel identifier in packets directed to and from the switch. The interface chip also manipulates routing tags for the packets which are used for internal routing purposes in the switch. The interface chip includes a local interface through which packets may be extracted from or added to a packet stream flowing between a main input and a main output of the interface. The interface chip polices different communications channels handled in the interface chip by detecting whether traffic in those channels exceeds certain network usage parameters. The interface is also capable of gathering certain statistical information about the traffic in certain communications channels to allow evaluation of network performance. These operations are performed in hardware on a single integrated circuit chip involving a single table look up. This table look up involves addressing a content addressable memory with a predetermined portion of the header of a packet. Finding a match between the predetermined portion of the packet header and the content of the content addressable memory causes the memory to produce an address signal which acts as a pointer to a location in a random address memory containing a parameter block having data used to perform the operations of the interface.

Area-efficient decoders for rate-k/n convolutional codes and other high

A semiconductor integrated circuit, and process for its manufacture, are disclosed which contains both n.sup.+ and p.sup.+ gates that do not pose a risk of dopant interdiffusion. Both n.sup.+ and p.sup.+ gates may be fabricated by conventional means. The gate structures are severed over the tub boundaries. A titanium nitride interconnective layer is deposited and patterned over the gates. The interconnective layer preserves connectivity between the n.sup.+ and p.sup.+ gates without risk of deleterious dopant interdiffusion.

Integrated circuit fabrication

An apparatus and method for programmable field masking in content-addressable memory (CAM). The present invention provides a CAM with at least one group of memory cells interconnected by a word line and a match line. The group of memory cells includes data memory cells divided into a number of data memory cell fields for storing data bits of a data word. A mask memory cell is provided within the group of memory cells for storing at least one mask bit indicating a status of data stored in at least one of the data memory cell fields. The mask memory cell is operative to interrupt the match line in response to the stored mask bit. A match line detector detects a signal level on the match line to indicate if input data bits supplied on the data memory cell bit lines match data bits stored in at least one of the data fields. The data memory cell fields may be organized into a hierarchy, with mask memory cells connected between the data fields, to provide hierarchical masking. General programmable masking of any data field within the group is provided using multiplexed mask memory cells connected by bypass lines. The multiplexed mask memory cells may store one or more mask bits in order to allow a bypass line to be connected to portions of the match line, thereby masking a given data memory cell field.

Growing community of inventors

Holmdel, NJ, United States of America

Horng-Dar Lin