Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Hoon Jung

Yoo-Sang Hwang

Hyun Seok Lee

Moo Young Kim

Byung-jun Park

Ji Woo Lee

In-Seak Hwang

Min Woo Song

Hyo Seok Na

Si-Youn Kim

Seung Hoon Han

Yoo-sang Hwang

Hyeon Seok Bae

Gyu Ik Kim

Sung Won Moon

Choong Seob Oh

Joo Hoan Do

Eui Chan Jung

A method of controlling an electronic device is provided which includes electrically connecting a battery with an external power source using a first switch such that a first portion of a first current supplied from the external power source is supplied to a system circuit of the electronic device and a second portion of the first current is supplied to the battery, determining whether a specified condition is satisfied, electrically disconnecting the battery from the external power source using the first switch and electrically connecting the battery with a resistor using a second switch, if the specified condition is satisfied, verifying an electrical characteristic of a current applied to the resistor while the battery is electrically disconnected from the external power source and is electrically connected with the resistor, and determining whether an operation of the battery is abnormal, based at least on a part of the electrical characteristic.

Electronic device for checking battery abnormality and control method thereof

A method of driving a display device includes analyzing input data of the display device to confirm whether there is a predetermined image pattern in an image corresponding to the input data, where a common voltage is distorted to an extent that a clock signal for a gate driver of the display device is distorted when the display device displays the image including the predetermined image pattern, and changing a slew rate of an output buffer of a data driver of the display device based on a result of the analyzing the input data.

Display device and driving method of display device

An integrated circuit device includes a semiconductor substrate that has a cell region and a peripheral region that surrounds the cell region. A plurality of capacitors that include a plurality of lower electrodes, respectively, are disposed in the cell region. Supporters connect adjacent ones of the plurality of lower electrodes to provide structural support and stability to the lower electrodes.

Methods of forming integrated circuit devices including cylindrical capacitors having supporters between lower electrodes

Cylindrical capacitors and methods of fabricating the same are provided. The cylindrical capacitor includes a cylindrical storage node stacked on a semiconductor substrate. The cylindrical storage node has a base and a stepped sidewall located on the base. The stepped sidewall has at least two sub-sidewalls, which are sequentially stacked, and at least one joint portion that connects a lower sidewall of the sub-sidewalls to an upper sidewall stacked on the lower sidewall. An upper diameter of the respective sub-sidewalls is greater than a lower diameter thereof. Also, the upper diameter of the lower sidewall is greater than the lower diameter of the upper sidewall stacked on the lower sidewall. The method of fabricating the cylindrical storage node having a stepped sidewall includes sequentially forming a plurality of molding layers over a semiconductor substrate. An etch rate of a lower molding layer of the plurality of molding layers being faster than that of an upper molding layer on the lower molding layer with respect to a predetermined etchant. The plurality of molding layers are patterned to form a preliminary storage node hole that exposes a portion of the semiconductor substrate. The patterned molding layers are isotropically etched using the etchant, thereby forming a storage node hole. Therefore, the storage node hole has a stepped sidewall profile. A conformal conductive layer is then formed on the substrate and the conductive layer is planarized until a top surface of the molding layers is exposed.

Cylindrical capacitors having a stepped sidewall and methods for fabricating the same

A doped polysilicon layer is used to form interconnections in a semiconductor device through contact holes. The doped polysilicon layer reaches through contact holes formed in an interlayer insulation layer to reach a suicide layer formed in exposed portions of respective impurity regions.

Semiconductor device having polysilicon interconnections and method of making same

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Gyeongsangbuk-do, South Korea

Hoon Jung