Samsung Electronics Co., Ltd.

Hoon-Joo Na

Sang-Jin Hyun

Jae-Yeol Song

Wan-don Kim

Hyeok-Jun Son

Hyung-Seok Hong

Hu-Yong Lee

Hye-Lan Lee

Oh-seong Kwon

Yoon-Tae Hwang

Min-Woo Song

Moon-Kyu Park

Byoung-Hoon Lee

Sung-In Suh

Ki-Joong Yoon

Chan-Hyeong Lee

Hong-Bae Park

Yu-Gyun Shin

Hong-bae Park

Tae-Yeong Kim

Taek-Soo Jeon

Jeong-Hee Han

Sug-Hun Hong

Sang-jin Hyun

Sung-kee Han

Hoe-Chul Kim

Bo-un Yoon

Jun-Hyung Kim

Pil-Kyu Kang

Sang-Bom Kang

June-Hee Lee

Kwang-Jin Moon

Dong-Soo Lee

Hyo-San Lee

Kun-Tack Lee

Seok-Ho Kim

Hyung-seok Hong

Hag-ju Cho

Won-Keun Chung

Jin-Kyu Jang

Young-suk Chai

Sun-gyu Choi

A semiconductor device includes an active region in a substrate, at least one nano-sheet on the substrate and spaced apart from a top surface of the active region, a gate above or below the nano-sheet, a gate insulating layer between the at least one nano-sheet and the gate, and source/drain regions on the active region at both sides of the at least one nano-sheet. The at least one nano-sheet includes a channel region; a gate disposed above or below the nano-sheet and including a single metal layer having different compositions of metal atoms of a surface and an inside thereof; a gate insulating layer between the nano-sheet and the gate; and source/drain regions disposed in the active region of both sides of the at least one nano-sheet.

Semiconductor device

Semiconductor device having less defects in a gate insulating film and improved reliability and methods of forming the semiconductor devices are provided. The semiconductor devices may include a gate insulating film on a substrate and a gate electrode structure on the gate insulating film. The gate electrode structure may include a lower conductive film, a silicon oxide film, and an upper conductive film sequentially stacked on the gate insulating film. The lower conductive film may include a barrier metal layer.

Semiconductor devices and methods of fabricating the same

A semiconductor laser device may include a first cladding on a substrate, an optical waveguide on the first cladding, a laser light source chip on the optical waveguide to generate a laser beam, a first adhesive layer between the optical waveguide and the laser light source chip, and a second adhesive layer covering a sidewall of the laser light source chip.

Semiconductor laser device

Provided are an integrated circuit device and a method of manufacturing the same. The integrated circuit device includes: a semiconductor substrate; a device isolation layer defining an active region of the semiconductor substrate; a gate insulating layer on the active region; a gate stack on the gate insulating layer; a spacer on a sidewall of the gate stack; and an impurity region provided on both sides of the gate stack, wherein the gate stack includes a metal carbide layer and a metal layer on the metal carbide layer, wherein the metal carbide layer includes a layer having a carbon content of about 0.01 at % to about 15 at %.

Integrated circuit device and method of manufacturing the same

A wafer bonding apparatus including: a lower chuck to which a lower wafer is secured at a peripheral portion of the lower chuck; an upper chuck to which an upper wafer is secured; a bonding initiator for pressuring a central portion of the upper wafer until the central portion of the upper wafer reaches a central portion of the lower wafer, thereby initiating a bonding process of the upper and the lower wafers by deforming the upper wafer; and a bonding controller for controlling a bonding speed between a peripheral portion of the upper wafer and a peripheral portion of the lower wafer such that the upper wafer becomes un-deformed prior to bonding the peripheral portion of the upper wafer and the peripheral portion of the lower wafer.

Wafer bonding apparatus for directly bonding wafers and a wafer bonding system having the same

Integrated circuit devices include a substrate including first and second fin-type active regions and first and second gate structures. The first gate structure includes first gate insulating layer on the first fin-type active region to cover upper surface and both side surfaces of the first fin-type active region, first gate electrode on the first gate insulating layer and has first thickness in first direction perpendicular to upper surface of the substrate, and second gate electrode on the first gate electrode. The second gate structure includes second gate insulating layer on the second fin-type active region to cover upper surface and both side surfaces of the second fin-type active region, third gate insulating layer on the second gate insulating layer, third gate electrode on the third gate insulating layer and has second thickness different from the first thickness in the first direction, and fourth gate electrode on the third gate electrode.

Methods of manufacturing integrated circuit devices having a fin-type active region

A semiconductor device includes a first transistor comprising a first dielectric film on a substrate and a first work function metal film of a first conductivity type on the first dielectric film, a second transistor comprising a second dielectric film on the substrate and a second work function metal film of the first conductivity type on the second dielectric film, and a third transistor comprising a third dielectric film on the substrate and a third work function metal film of the first conductivity type on the third dielectric film. The first dielectric film comprises a work function tuning material and the second dielectric film does not comprise the work function tuning material. The first work function metal film has different thickness than the third work function metal film. Related methods are also described.

Semiconductor devices having work function metal films and tuning materials

A method of forming a thin film includes forming an interface layer stack on a semiconductor substrate. Forming the interface layer stack may include performing a first surface treatment on the semiconductor substrate under a reducing atmosphere. Forming the interface layer stack may include performing a second surface treatment on the semiconductor substrate. The first surface treatment may be performed under a reducing atmosphere and the second surface treatment may be performed under a nitridation atmosphere. The first surface treatment may include forming a lower interface layer on a surface of the semiconductor substrate and the second surface treatment may include forming an upper interface layer. The first surface treatment may include selectively removing at least one oxide material from a native oxide film on the semiconductor substrate.

Method of forming thin film and method of manufacturing semiconductor device

A method of curing a dielectric layer, such as a dielectric layer that has a relatively small thickness and/or a narrow width or a complicated shape, is provided. The method of curing a dielectric layer for the manufacture of a semiconductor device includes providing the dielectric layer, wherein the dielectric layer is on a semiconductor layer; forming a first metal-containing layer on the dielectric layer; forming a curing atom screening region in an upper portion of the first metal-containing layer by injecting screening atoms onto an upper surface of the first metal-containing layer; injecting curing atoms into the first metal-containing layer through the upper surface of the first metal-containing layer; and flowing the curing atoms into the dielectric layer in an atmosphere at a first temperature.

Methods of curing a dielectric layer for manufacture of a semiconductor device

Provided are a semiconductor device configured to block a physical diffusion path by forming an oxide layer between barrier layers to prevent impurities from being diffused through the physical diffusion path between the barrier layers, and a method for fabricating the semiconductor device. The semiconductor device includes a gate insulation layer formed on a substrate, a first barrier layer formed on the gate insulation layer, an oxide layer formed on the first barrier layer, the oxide layer including an oxide formed by oxidizing a material included in the first barrier layer, a second barrier layer formed on the oxide layer, a gate electrode formed on the second barrier layer, and source/drains disposed at opposite sides of the gate electrode in the substrate.

Semiconductor devices and methods for fabricating the same

Integrated circuit devices having a Fin-type active region and methods of manufacturing the same

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Hwaseong-si, South Korea

Hoon-Joo Na