Samsung Electronics Co., Ltd.

Hoon-Jin Bang

Jong-Hoon Jung

Hyo-Sang Lee

Gyu-Hong Kim

Dong-Ryul Chang

Hwa-Sook Shin

Myoung-Kyu Seo

Provided is a programmable circuit. The programmable circuit includes a first path and a second path connected in parallel between a first voltage node and a second voltage node. The first path includes a first programmable element, a first node, a first pull-up transistor, a second node, and a first pull-down transistor connected in series between the first voltage node and the second voltage node. The second path includes a second programmable element, a third node, a second pull-up transistor, a fourth node, and a second pull-down transistor connected in series between the first and second voltage nodes. A gate electrode of the first pull-up transistor, a gate electrode of the first pull-down transistor, and the fourth node are electrically connected to one another. A gate electrode of the second pull-up transistor, a gate electrode of the second pull-down transistor, and the second node are electrically connected to one another.

Programmable circuit including differential amplifier circuit

A voltage generator and methods thereof are provided. The example voltage generator may include a voltage comparison block which generates an output voltage in response to a read command, the output voltage corresponding to a difference between a reference voltage and a determination voltage and a voltage generation block which outputs the determination voltage and a comparison voltage in response to the read command, an inverse read command having a phase opposite that of the read command, a switching pulse signal and the output voltage. A first example method may include outputting a determination voltage and a comparison voltage in response to a read command, an inverse read command having a phase opposite that of the read command, a switching pulse signal and an output voltage, the output voltage generated in response to the read command and corresponding to a difference between the reference voltage and the determination voltage. A second example method may include maintaining a comparison voltage at a first voltage level if a read command is disabled and transitioning the comparison voltage to a second voltage level if the read command is enabled by discharging electric current along a first path, the first path connected to a first node coupled to at least one resistor, and a second path, the second path connected to a second node coupled with a switched capacitor circuit, the switched capacitor circuit including a capacitor which is selectively connected to the second node in response to the enabled read command.

Voltage generator and methods thereof

A word line driving circuit includes a read voltage generator and a word line driver. The read voltage generator precharges a clamp capacitor with a power supply voltage to stably generate a read voltage in response to a read command. A capacitance of the clamp capacitor is varied to compensate for a fluctuation of a power supply voltage level. The word line driver distributes electric charges precharged in the clamp capacitor to a word line in response to a word line selecting signal. Therefore, the word line driving circuit reduces unnecessary power consumption in a standby mode by operating the word line rapidly with charge sharing in a read mode.

Circuit and method of driving a word line by changing the capacitance of a clamp capacitor to compensate for a fluctuation of a power supply voltage level

A word line driving circuit may include a first word line driver, a second word line driver and a pass transistor. In response to a word line selecting signal, the first word line driver may drive a word line using a first word line driving voltage signal in a first operation mode or the second word line driver may drive the word line using a second word line driving voltage signal. The pass transistor coupled between the first word line driver and the word line may transmit the first word line driving voltage signal to the word line in response to a control voltage signal, which is self-boosted at an initial stage of the first operation mode and is maintained at a stable voltage level after a time period.

Circuit and method of driving a word line of a memory device

A flash cell fuse circuit includes a fuse cell array, a plurality of switch circuits and a plurality of fuse sense amplifiers. The fuse cell array outputs first signals in response to word line enable signals after a program or erase operation. The switch circuits pass one of the first signals in response to a reset signal and one of the word line enable signals. The fuse sense amplifiers each generate a fuse signal by detecting and amplifying an output signal of a corresponding switch circuit.

Growing community of inventors

Seoul, South Korea

Hoon-Jin Bang