Samsung Electronics Co., Ltd.

Hoon-Chi Lee

Ki-Soon Bae

A semiconductor memory device and a method of manufacturing same, wherein landing pads are formed to contact source/drain regions of an access transistor in a memory cell array area and a first resistor device is formed in the peripheral circuit area, by depositing a first conductive layer on a semiconductor substrate having an access transistor formed thereon and patterning the first conductive layer. An interlayer insulation layer is deposited on the resultant structure, and a lower electrode and a dielectric layer having a high dielectric constant of a capacitor are formed to contact the source/drain region of the access transistor. By depositing a second conductive layer on the resultant structure having the dielectric layer and patterning the dielectric layer, a capacitor upper electrode is formed in the memory cell array area and a second resistor device is formed in the peripheral circuit area.

Growing community of inventors

Yongin-shi, South Korea

Hoon-Chi Lee