Nxp B.v.

Hongyun Zhang

Jian Qing

Tinghua Yun

XinDong Duan

RuoXi Wang

Zhongmeng Chen

A multi-channel digital to analog converter, DAC, comprising: a DAC configured to provide an analog signal comprising a plurality of time division multiplexed sub-signals, each provided for one of a plurality of output channels; wherein each of the output channels include: a sampling capacitor; a selector switch configured to couple the sampling capacitor of the respective output channel to the output terminal of the DAC such that the sampling capacitor samples the analog signal over a plurality of discrete sampling periods; a comparator configured to provide a comparator output signal, wherein the sampling capacitor is coupled to an input terminal of the comparator; and an output control gate configured to control whether or not the comparator output signal is output from the respective output channel at a predetermined time later than a first of the respective plurality of discrete sampling periods.

Multi-channel digital to analog converter

There is disclosed a single-wire Interface bus transceiver system comprising: an I2C master, a master transceiver, a signal wire, a slave transceiver and an I2C slave, wherein the master transceiver is adapted to encode master data SDA and master clock SCL received from I2C master using Manchester code, generate master single wire signal and transfer it to the slave transceiver through the signal wire, the master transceiver is also adapted to decode Manchester-encoded slave signal received from the signal wire and transfer the decoded slave data to I2C master; the slave transceiver is adapted to encode slave data received from I2C slave using Manchester code, generate slave single wire signal and transfer it to the master transceiver through the signal wire, the slave transceiver is also adapted to decode Manchester-encoded master signal received from the signal wire, generate the recovered master clock and transfer the decoded master data and recovered master clock to I2C slave.

Single-wire interface bus transceiver system based on I2C-bus, and associated method for communication of single-wire interface bus

Embodiments of a method and system are disclosed. One embodiment of a method for address decoding in a data communications system using a serial data transfer bus is disclosed. The method involves, detecting a start command from a master device of the data communications system at the serial data transfer bus, and disabling an address decoder of a slave device of the data communications system in response to the detecting the start command.

Growing community of inventors

Shanghai, China

Hongyun Zhang