Samsung Electronics Co., Ltd.

Skhynix Inc.

Hongyu Wang

Yibing Michelle Wang

Ilia Ovsiannikov

Jeff Rysinski

Kwang Oh Kim

Chunji Wang

Tae-Chan Kim

Sang-Soo Lee

Zhengping Ji

Taechan Kim

Kwanghyun Lee

Deokha Shin

Gregory Waligorski

Wang-Hyun Kim

A direct time-of-flight (DTOF) LiDAR system includes a sensor array, a first gated time-to digital converter (TDC) circuit and second TDC circuit. The sensor array includes pixels arranged to detect a first disparity location on the sensor array of a reflection signal received from a first object at a first range with respect to a second disparity location on the sensor array of a reflection signal received from a second object at a second range that is greater than the first range. The first TDC circuit generates first timestamp information relating to detection of the first reflection signal in which the first gated TDC circuit is gated based on the first disparity location. The second gated TDC circuit generates second timestamp information relating to detection of the second reflection signal in which the second gated TDC circuit is gated based on the second disparity location.

Low power LiDAR system with smart laser interrogration

A LiDAR system is disclosed that includes a SPAD unit array and J read group (RG) channels. The SPAD unit array is arranged in M rows and N columns of pixel read groups. Each row includes K pixel read groups. Each pixel read group outputs a detection signal in response to a light pulse that is incident on the pixel read group. Each RG channel corresponds to at least one row of pixel read groups and includes L time-to-digital converters that respectively generate timestamp information corresponding to detection event signals of each of L pixel read groups in the at least one row of pixel read groups in which J<M and L≤K. Each RG channel stores the timestamp information in an accumulator bin of a histogram circuit corresponding to a value of the timestamp information using hardwired addressing based on the value of the timestamp information.

SPAD image sensor

Provided are an imaging device implementing pseudo correlated double sampling (CDS), and an imaging method and a control method of the image device. The imaging device includes: a pixel array comprising a pixel configured to generate a current in response to incident light; a readout circuit configured to read out a plurality of output signals of the pixel, the plurality of output signals corresponding to a plurality of consecutive integration periods of the pixel within an aggregating period; and an aggregator configured to aggregate the plurality of output signals read out by the readout circuit to obtain a final aggregated output corresponding to illuminance for the aggregating period, wherein the readout circuit is configured to read out the plurality of output signals by, for each output signal, sampling a signal voltage of the pixel and sampling a subsequent reset voltage of the pixel and obtaining a difference therebetween.

Reset noise reduction for pixel readout with pseudo correlated double sampling

An embodiment includes a system, comprising: a buffer configured to store a plurality of events, each event including a plurality of bits; an output circuit configured to output events from the buffer; and a controller coupled to the buffer and the output circuit and configured to: cause the output circuit to output a first event from the buffer; and select a second event from the buffer to be output by the output circuit after the first event based on bits associated with the first event.

Systems and methods of selective output for reducing power

In some embodiments, an imaging device includes a pixel array. At least one of the pixels includes a photodiode that can generate charges, and a select transistor that receives the charges in its bulk. When the select transistor is selected, a pixel current through it may depend on a number of the received charges, thus evidencing how much light it detected. A reset transistor may reset the voltage of the bulk.

Imaging devices, arrays of pixels receiving photocharges in bulk of select transistor, and methods

A pixel array includes regular pixels for imaging, and special pixel sites interspersed among the regular pixels. When the regular pixels become saturated from bright illumination, at least some of their excess charges are removed by the special pixel sites. The removal can reduce or eliminate blooming. In some embodiments, the special pixel sites include special pixels. For imaging, the regular pixels of a group such as a sub-array provide regular outputs that are combined into a composite signal. The special pixels provide a special output. The special output of the group may optionally be added to the composite signal, which can increase the dynamic range.

Pixel arrays and imaging devices with reduced blooming, controllers and methods

An embodiment includes a system, comprising a first memory; a plurality of first circuits, wherein each first circuit is coupled to the memory; and includes a second circuit configured to generate a first output value in response to an input value received from the first memory; and an accumulator configured to receive the first output value and generate a second output value; and a controller coupled to the memory and the first circuits, and configured to determine the input values to be transmitted from the memory to the first circuits.

Low power computation architecture

Imaging systems, such as time-of-flight imaging systems, and methods with pixel sensitivity adjustments. An embodiment includes a method, comprising: for a plurality of pixels having a first output and a second output, measuring the first outputs and the second outputs in response to a demodulation signal; and adjusting the demodulation signal such that a combination of the first outputs is substantially similar to a combination of the second outputs.

Imaging systems and methods with pixel sensitivity adjustments by adjusting demodulation signal

A system for processing images may comprise a pixel configuration circuitry enabled to set for each pixel in a pixel array one of a plurality of integration times and one of a plurality of signal gains. A column analog-to-digital converter may be enabled to generate a corresponding digital data for a pixel in the pixel array, and digital processing circuitry may be enabled to interpolate output data from the corresponding digital data for pixels grouped into pixel groups, wherein the pixel group comprises a target pixel and neighboring pixels in a same color plane.

Dynamic range extension for CMOS image sensors for mobile applications

Aspects of the invention provide dynamic range extension for CMOS image sensors for mobile applications. An embodiment of the invention may comprise setting for each pixel in a pixel array one of a plurality of integration times and one of a plurality of signal gains, wherein the settings may be used to generate corresponding digital data for each pixel in the pixel array. The corresponding digital data for adjacent pixels for the same color plane may then be grouped into a superpixel, where each pixel has associated with it a different combination of integration time and signal gain.

Various embodiments of the present invention include enabling, during a calibration phase, a counter to count one less than a number of clock periods associated with a determined offset. The counted number of the clock periods is stored in calibration memory. In a conversion phase, inverted outputs are loaded from the calibration memory to the counter, where the counter is enabled to count the clock periods to determine a digital equivalent value of an analog signal amplitude.

Growing community of inventors

San Gabriel, CA, United States of America

Hongyu Wang