Vanjee Technology Co., Ltd.

Other

Chinese Academy of Sciences

Wuhan Vanjee Optoelectronic Technology Co., Ltd.

Yu, Hongyan

Hongyan Yu

Jiaoqing Pan

Yang Xu

Pengfei Wang

Qingfei Wang

Linyan Tian

Yejin Zhang

Wei Wang

Shiyan Li

Zhaosong Li

Xuliang Zhou

Zhibo Li

The present disclosure provides a phased array LiDAR transmitting chip of mixed materials, a manufacturing method thereof, and a LiDAR device. The phased array LiDAR transmitting chip of mixed materials includes: a first material structure layer and an SOI silicon waveguide structure layer, the first material structure layer is optically connected to the SOI silicon waveguide structure layer through a coupling connection structure; the first material structure layer is configured to couple input light into the chip; the coupling connection structure is configured to split a light wave coupled to the chip, and couple each of split light waves into a corresponding silicon waveguide in the SOI silicon waveguide structure layer; where a non-linear refractive index of the first material in the first material structure layer is lower than a non-linear refractive index of silicon material.

Phased array LiDAR transmitting chip of mixed materials, manufacturing method thereof, and lidar device

A phased array LiDAR transmitting chip of multi-layer materials includes: a first material structure layer and an SOI silicon waveguide structure layer, a rear end of the first material structure layer and a front end of the SOI silicon waveguide structure layer form a coupling connection structure. The first material structure layer includes an input coupler and a beam splitter. The input coupler is optically connected to the beam splitter. The beam splitter is optically connected to the SOI silicon waveguide structure layer through the coupling connection structure. The input coupler couples input light to the chip. The beam splitter split a light wave coupled to the chip. The coupling connection structure couples each split light wave to a silicon waveguide in the SOI silicon waveguide structure layer. A non-linear refractive index of a first material in the first material structure layer is lower than that of a silicon material.

Phased array LiDAR transmitting chip of multi-layer materials, manufacturing method thereof, and LiDAR device

Embodiments of the present disclosure provide a silicon-based optical antenna with a reflective layer and a preparation method therefor. The silicon-based optical antenna comprises: an SOI substrate, the SOI substrate at least comprises a bottom silicon layer, a buried oxide layer, and a top silicon layer, the buried oxide layer is located between the bottom silicon layer and the top silicon layer, the top silicon layer is etched to form a row of waveguides, spacings between the waveguides in the row of the waveguides are in an uneven distribution, each waveguide of the row of the waveguides is etched with gratings, the bottom silicon layer is formed with a groove directly reaching a surface of the buried oxide layer facing the bottom silicon layer, and the surface of the buried oxide layer in the groove is formed with a metal reflective layer.

Silicon-based optical antenna with reflective layer and preparation method therefor

A silo de-bridging device (), comprising: a rotary shaft () and at least one de-bridging unit () connected to the rotary shaft (); each de-bridging unit () includes a fixed sleeve (), a movable sleeve () and at least one de-bridging arm () connected to the movable sleeve (), and a cam structure is formed between two end surfaces of the movable sleeve () and the fixed sleeve () adjoining each other. The silo de-bridging device can de-bridge the materiel in the silo effectively.

Silo de-bridging device including a sleeve structure having a cam contour surface

A method can include: growing a Ge layer on a Si substrate; growing a low-temperature nucleation GaAs layer, a high-temperature GaAs layer, a semi-insulating InGaP layer and a GaAs cap layer sequentially on the Ge layer after a first annealing, forming a sample; polishing the sample's GaAs cap layer, and growing an nMOSFET structure after a second annealing on the sample; performing selective ICP etching on a surface of the nMOSFET structure to form a groove, and growing a SiOlayer in the groove and the surface of the nMOSFET structure using PECVD; performing the ICP etching again to etch the SiOlayer till the Ge layer, forming a trench; cleaning the sample and growing a Ge nucleation layer and a Ge top layer in the trench by UHVCVD; polishing the Ge top layer and removing a part of the SiOlayer on the nMOSFET structure; performing a CMOS process.

Method of manufacturing Si-based high-mobility group III-V/Ge channel CMOS

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Beijing, China

Hongyan Yu