Chengdu Boe Optoelectronics Technology Co., Ltd.

Boe Technology Group Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Hongting Lu

Jing Yang

Chenyu Chen

Wenbo Chen

Shuang Zhao

Zhongliu Yang

Yuhsiung Feng

Yanping Ren

Xin Mou

Lian Xiang

Xingyu Chen

Kuo Sun

Yangpeng Wang

Bing Zhang

Chao Yang

Zhuo Xu

Yan Yang

Changlong Yuan

Xing Huang

Hang Dong

Mengyue Fan

Baolei Huo

Linqian Han

Xueying He

A display substrate and a display device are provided. The display substrate includes a base substrate and a plurality of sub-pixels on the base substrate, each sub-pixel includes a pixel circuit, and the pixel circuit includes a first reset sub-pixel. The first reset sub-pixel is configured to apply a first reset voltage to a light-emitting element in response to a first reset control voltage to reversely bias the light-emitting element.

Display substrate and display device

The present disclosure provides a display substrate and a display device. The display substrate includes: a driver chip, a display area and a peripheral area surrounding the display area, the driver chip is located in the peripheral area, the driver chip is close to a first side of the display area; the display substrate further includes: a cathode layer extending from the display area to the peripheral area; a cathode auxiliary layer extending from the display area to the peripheral area, and the cathode auxiliary layer is coupled to the cathode layer in the display area; a power line layer located in the peripheral area, the power line layer includes a first power line pattern, and the first power line pattern is close to the first side of the display area; the first power line pattern is coupled to the cathode auxiliary layer.

Provided is a drive control circuit, which includes an input circuit (), a first output circuit () and a second output circuit (). An input circuit () is configured to control the potentials of a first node (N) and a second node (N) under the control of a signal input terminal (INT) and a clock signal terminal. The first output circuit () is configured to output a first power supply signal supplied by a first power supply line (VGH) to a first output terminal (OUT) under the control of a first node (N), or to output a second power supply signal supplied by a second power supply line (VGL) to the first output terminal (OUT) under the control of a second node (N).

Drive control circuit, gate drive circuit, display substrate and display apparatus

A display substrate has a display region, a peripheral region surrounding the display region, and pad regions on a first connection side of the peripheral region and distal to the display region. The display region includes sub-pixel regions. The display substrate further includes: a base, and organic light-emitting diodes and a first power supply line all on the base. The organic light-emitting diodes are provided in the sub-pixel regions, respectively. A cathode of each organic light-emitting diode extends from the display region to the peripheral region and is connected to the first power supply line in the peripheral region. The first connection side includes a first connection region corresponding to a position between two adjacent pad regions, and a second connection region other than the first connection region. A connection region between the first power supply line and the cathode covers at least part of the second connection region.

Display substrate and display apparatus

A display substrate and a display device. The display substrate includes a base substrate and a plurality of sub-pixels on the base substrate, each sub-pixel includes a pixel circuit, and the pixel circuit includes a drive sub-circuit and a first reset sub-pixel. The first reset sub-pixel is configured to apply a first reset voltage to a control terminal of the drive sub-circuit in response to a first reset control voltage; the display substrate further comprises a first reset signal line electrically connected with the first terminal of the first reset sub-circuit to provide the first reset voltage, and the first reset signal line is in a semiconductor layer and comprises a doped semiconductor material.

An array substrate, a display panel, and a driving method of the array substrate are provided. The array substrate includes: a plurality of pairs of gate lines, each pair including a first gate line and a second gate line, and a pixel array, including pixel units arranged into a plurality of rows and a plurality of columns. A scan signal terminal of a pixel unit of an nth column in an mth row of pixel units is connected to the first gate line in an mth pair of gate lines to receive a first scan signal; m and n are positive integers; a reset signal terminal of the pixel unit of the (n+1)th column in the mth row of pixel units is connected to the first gate line in the mth pair of gate lines to receive the first scan signal serving as a first reset signal.

Array substrate, display panel and driving method of array substrate

An array substrate includes N number of testing signal lines, N being an integer greater than 1; N number of first control signal lines; N number of second control signal lines; M number of first switching transistors; and M number of second switching transistors. A second electrode of a m-th first switching transistor is connected to a first electrode of a m-th second switching transistor, 1≤m≤M. A n-th testing signal line is connected to first electrodes of (kN+n)-th first switching transistors, 1≤n≤N, 0≤k<M/N. A n-th first control signal line is connected to gate electrodes of (kN+((n−1)*N)+1)-th to (kN+n*N)-th first switching transistors, 0≤k<M/N. A n-th second control signal line is connected to gate electrodes of the (kN+n)-th second switching transistors. A second electrode of the m-th second switching transistor is connected to a m-th array substrate signal line.

Array substrate, display panel, and method of testing array substrate

A display panel and a display device. The display panel comprises: a substrate, a display area () provided with at least one light-emitting signal line (E), at least one first reset signal line (R) and sub-pixels arranged in an array, at least one sub-pixel (P, P, P) comprising: a light-emitting device (L) and a pixel circuit. The first reset signal line (R) is configured to provide a reset control signal for the pixel circuit, the light-emitting signal line is configured to provide a light-emitting control signal for the pixel circuit to provide a driving current. For the first reset signal line and the light-emitting signal line E connected to a same pixel circuit, the duration in which the signal of the light-emitting signal line is an invalid level signal is equal to the duration in which the signal of the first reset signal line is a valid level signal.

Display panel and display device

The present disclosure provides a resetting control signal generation circuitry, a resetting control signal generation method, a resetting control signal generation module and a display device. The resetting control signal generation circuitry includes a resetting control signal output end, a first node control circuitry, a second node control circuitry, a first output circuitry and a second output circuitry. The first output circuitry is configured to enable the resetting control signal output end to be electrically coupled to or electrically decoupled from a first voltage end under the control of a potential at a first node. The second output circuitry is configured to enable the resetting control signal output end to be electrically coupled to or electrically decoupled from a second voltage end under the control of a potential at a second node.

Resetting control signal generation circuitry, method and module, and display device

A display substrate and a drive method thereof and a display device. The display substrate includes a base substrate and a plurality of sub-pixels on the base substrate, each sub-pixel includes a pixel circuit, and the pixel circuit includes a first reset sub-pixel. The first reset sub-pixel is configured to apply a first reset voltage to a light-emitting element in response to a first reset control voltage to reversely bias the light-emitting element.

Display substrate and drive method thereof, and display device

The embodiments of the present disclosure provide an array substrate and a related display panel and a related display device. An array substrate includes a plurality of pairs of scan signal lines. A first scan signal line of the m-th pair of scan signal lines is configured to provide a first scan signal to a sub-pixel in a (2n−1)-th column from sub-pixels in the m-th. And a plurality of pairs of driving reset control signal lines. A second driving reset control signal line of the m-th pair of driving reset control signal lines is configured to provide a second driving reset control signal to the sub-pixel in the 2n-th column from the sub-pixels in the m-th row. The m and n are integers greater than or equal to 1. In the embodiments of the present disclosure, the first scan signal line of the m-th pair of scan signal lines and the second driving reset control signal line of the m-th pair of driving reset control signal lines are the same signal line.

Array substrate, and display panel and display device thereof

The present disclosure relates to an array substrate and a display panel and a display device thereof. The array substrate comprises: a substrate; a pixel array disposed on the substrate, comprising a plurality of sub-pixels arranged in a plurality of rows and a plurality of columns; a plurality of pairs of scan signal lines, extending in a row direction and being spaced apart from each other in a column direction; and a reset voltage source signal line and a data signal line, extending in the column direction.

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Beijing, China

Hongting Lu