University of Kwazulu-natal

Hongjun Xu

Peter Odero Akuon

Kyle Govindasamy

This invention relates to decorrelation of signals in order to improve coding gains of wireless communications. To this end a branch signal processor includes a summer to determine a sum of a first branch signal and a second branch signal to produce a sum signal. A conjugate swapper to determine a conjugate swap of the first branch signal and a conjugate swap of the second branch signal to produce two swapped signals, wherein the conjugate swapper takes an imaginary part of the first branch signal to become a real part and a real part of the first branch signal to become an imaginary part of a new complex signal which new complex signal becomes a first swapped signal, and wherein the conjugate swapper takes an imaginary part of the second branch signal to become a real part and a real part of the second branch signal to become an imaginary part of a second complex signal which second complex signal becomes a second swapped signal. A differencer determines a difference of the first swapped branch signal and the second swapped branch signal to produce a difference signal and a diversity combiner configured to combine the sum signal, the first branch signal, the second branch signal and the difference signal.

Receive decorrelator for a wireless communications system

A space time labelling technique for wireless communication systems is provided. A transmitter for implementing the technique includes a first bit mapper and a second bit mapper which is different to the first bit mapper and first and second transmitters. A processor is connected to the first and second mappers and the first and second transmitters and controls these to receive two bit streams and simultaneously feed these into the first mapper and the second mapper. The first mapper maps these into first and second mapped bit streams and the second mapper maps these into third and fourth mapped bit streams which are different from the first and second mapper bit streams. The first mapped bit stream is transmitted in a first time slot via the first transmitter and the second mapped bit stream is transmitted in the first time slot via the second transmitter. The third mapped bit stream is transmitted in a second time slot via the second transmitter and finally the fourth mapped bit stream is transmitted in a second time slot via the first transmitter.

Growing community of inventors

Durban, South Africa

Hongjun Xu