Lg Display Co., Ltd.

HongJae Shin

SooHong Choi

Jeonghwan Kim

Jongsik Shim

Jaeyi Choi

Minkyu Chang

JaeKyu Park

KwangMo Park

Seongho Yun

YongHo Kim

YoonJu Lee

Miyoung Son

MiYoung Son

JaYeon Song

Woojin Nam

JaeYoung Oh

EungKyu Kim

NaYoung Bae

WooSup Shin

Sujin Hwang

Min-June Jang

Jeongrim Seo

WooJin Nam

Dongmyoung Kim

KwangSoo Kim

Byunghyun Park

MinKyu Chang

Ingu Han

The present disclosure relates to a display panel for gate driving and a display device, which include a gate driving panel circuit and are capable of providing a stable power wiring structure for stably supplying high voltages and low voltages to the gate driving panel circuit disposed in the display panel.

Display panel for gate driving and display device

A display panel and a display device are disclosed and, more specifically, the display panel includes a substrate including a display area where a plurality of subpixels are disposed, a gate driving circuit disposed in a non-display area outside the display area to supply a plurality of scan signals to the plurality of subpixels, an electrostatic discharge unit disposed in the non-display area, and a plurality of pads disposed in the non-display area and coupled with a plurality of signal lines electrically connected to the gate driving circuit and the electrostatic discharge unit, wherein the plurality of pads include, as sequentially disposed, a clock pad connected with a clock signal line, a first line pad connected with a first power line, an additional pad connected with an electrostatic discharge high-potential voltage line and an electrostatic discharge low-potential voltage line, and a second line pad connected with a second power line.

Display panel and display device

A display device and a gate driving panel circuit including the same are discussed. The gate driving panel circuit in an example includes an output buffer block configured to receive a clock signal and output a scan signal, and a logic block configured to control respective voltages of a Q node and a QB node electrically connected to the output buffer block. The output buffer block includes a pull-up transistor disposed between a clock node to which the clock signal is input and an output node to which the scan signal is output, and a pull-down transistor disposed between a gate low voltage node to which a gate low voltage is applied and the output node. A gate node of the pull-up transistor is electrically connected to the Q node.

Gate driving panel circuit and display device

The present disclosure relates to a display panel and a display device, and can provide a display panel and a display device that have a clock signal line arrangement structure that is advantageous to electrostatic discharge.

Embodiments of the present disclosure are related to a gate driving circuit and a display device, by a boot capacitor controlling a voltage level of a Q node at a timing that the gate driving circuit outputs a gate signal of a turn-on level and a pump capacitor controlling the voltage level of the Q node in a period that the gate signal of the turn-on level is output, a level of the gate signal can be maintained stably even in the case that the gate signal of the turn-on level is output in a long time.

Gate driving circuit and display device

A display device includes a level shifter and a gate driving circuit that can reduce differences in characteristics among gate signals to improve image quality by controlling a signal waveform of a first clock signal of the m number of clock signals different from a signal waveform of an m-th clock signal when m number of gate signals is output by using m number of clock signals.

Level shifter, gate driving circuit, and display device

Disclosed are a gate driver circuit having a reduced size, and a display device including the same. The gate driver circuit includes a plurality of stage circuits. Each stage circuit supplies a gate signal to each of gate lines arranged in a display panel, and includes a M node, a Q node, a QH node, and a QB node. Each stage circuit includes a gate signal output module configured to operate based on a voltage level of the Q node or a voltage level of the QB node to output first to j-th gate signals based on first to j-th scan clock signals or a first low-potential voltage.

Gate driver circuit and display device including the same

A gate driving circuit and a light emitting display apparatus comprising the same are discussed, in which a charging characteristic of a control node is improved. The gate driving circuit comprises first to mth stage circuits, wherein each of the first to mth stage circuits includes first to third control nodes, a node control circuit controlling a voltage of each of the first to third control nodes, and an output buffer circuit outputting each of a scan signal, a sense signal and a carry signal in accordance with each of the first to third control nodes, the node control circuit including a node setup circuit charging a first gate high potential voltage in the first control node in response to a first carry signal supplied from a front stage circuit.

Gate driving circuit and light emitting display apparatus comprising the same

A gate driving circuit and a display apparatus including the same are disclosed, in which a plurality of gate lines may be driven through one stage circuit. The gate driving circuit includes first to mth stage circuits outputting a plurality of scan signals by dividing the scan signals into a first signal group and a second signal group. The first to mth stage circuits are grouped into k number of stage groups having two adjacent stage circuits, stage circuits of jth stage group (j is a natural number of 1 to k&#x2212;1) output the scan signals of the first signal group to be earlier than the scan signals of the second signal group, and stage circuits of (j+1)th stage group output the scan signals of the second signal group to be earlier than the scan signals of the first signal group.

Gate driving circuit and display apparatus comprising the same

By forming a repair structure in a horizontal direction and vertical direction by using one or more repair lines between two or more pixels adjacent to each other in a display panel, even though a dark spot appears due to a defective operation of one pixel, the one pixel may be compensated to be driven by using the other pixel.

Organic light emitting display device and repair method thereof

An organic light emitting display device and a method of repairing the device are discussed. According to an embodiment, the device includes a display panel having pixels, each including an OLED in every pixel area defined as scan and data lines intersect with each other and having a repair structure in at least one of horizontal and vertical directions between adjacent pixels by one or more repair lines; a timing controller configured to generate compensation data when a dark spot is generated in one of the plurality of pixels of the display panel, and adjust a magnitude of image data according to the compensation data; and a data driver configured to adjust a magnitude of a data voltage according to the image data adjusted in magnitude, and output the data voltage adjusted in magnitude to the data lines.

Discussed is an organic light-emitting display panel including: an active area corresponding to an image display region; and a non-active area corresponding to a region outside of the active area, wherein the active area includes a plurality of signal lines arranged in an array, wherein the non-active area includes a pad region to which a source driver IC is mounted, and a switching structure, wherein the pad region includes a plurality of pads arranged in correspondence with the array of the signal lines, and wherein the switching structure includes: a common reference voltage pad-connection terminal connected to a common reference voltage pad of the display panel; a plurality of reference voltage line-connection terminals connected to a plurality of reference voltage lines of the display panel; and a switching circuit to switch connections between the common reference voltage pad-connection terminal and the plurality of reference voltage line-connection terminals.

Organic light-emitting display panel and organic light-emitting display device

An organic light emitting display can include a display panel including a plurality of pixels of a source following manner, in which a source voltage of a driving thin film transistor (TFT) is changed according to a current flowing between a drain electrode and a source electrode of the driving TFT, a gate driving circuit for generating a mobility sensing gate pulse for operating the pixel in the source following manner, a data driving circuit for detecting a sensing voltage corresponding to mobility of the driving TFT from the pixel in response to the mobility sensing gate pulse, and a timing controller for setting a mobility sensing period in a period, in which a gate-source voltage of the driving TFT is greater than a threshold voltage of the driving TFT.

Organic light emitting display and method of compensating for mobility thereof

An organic light emitting display comprises: a driving TFT comprising a gate connected to a node B, a drain connected to an input terminal of high-potential cell driving voltage, and a source connected to the organic light emitting diode through a node C; a first switching TFT for switching the current path between a node A and the node B in response to a light emission control signal; a second switching TFT for initializing the node C in response to an initialization signal; a third switching TFT for initializing either the node A or the node B in response to the initialization signal; a fourth switching TFT for switching the current path between a data line and the node B in response to a scan signal; a compensation capacitor connected between the node B and the node C.

Organic light emitting display and driving method thereof

Disclosed are an organic light emitting display device and a display panel thereof, which are capable of performing a recovery driving for recovering a threshold voltage of a driving transistor to be within a range of compensation for the threshold voltage if the threshold voltage of the driving transistor deviates from the range of the compensation for the threshold voltage as a driving time of the driving transistor of a pixel increases.

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Seoul, South Korea

HongJae Shin