Ricoh Company, Ltd.

Chengdu Boe Optoelectronics Technology Co., Ltd.

Boe Technology Group Co., Ltd.

Beijing Boe Technology Development Co., Ltd.

Huawei Technologies Co., Limited

Boe Technology Group

Hong Yi

Wei Wang

Haigang Qing

Tiaomei Zhang

Liyan Liu

Mengqi Wang

Haihua Yu

Zhengkun Li

De Li

Haijing Jia

Wenbo Chen

Weitao Gong

Zhongliu Yang

Quanyong Gu

Ziyang Yu

Shilong Wang

Ke Liao

Qingqing Yan

Yupeng Zhang

Xin Wang

Weiyun Huang

Benlian Wang

Jun Yan

Lili Du

Juan Zhang

Linhong Han

Yuanjie Xu

Yunsheng Xiao

Yan Sun

Youngyik Ko

Qiwei Wang

Pan Zhao

Shengyin Fan

Gukhwan Song

Bin Da

Guo Ning Liu

Chaofeng Li

Yu Deng

Makoto Odamaki

Hongyi Liu

Hengzhi Zhang

Daojing Li

Huan Jia

Display substrate, manufacturing method thereof and display apparatus are provided. The display substrate includes display and periphery areas, and further includes: first and second signal lines, first and second planarization layers, where each of first and second signal lines is located at periphery area, and includes portion extending in first direction; at least part of first signal line is located between display area and second signal line, first spacing region is provided between projection of first signal line onto base of display substrate and projection of second signal line onto base; first planarization portion including first planarization portion located at periphery area; second planarization layer including first via hole, projection of which onto base overlaps with first spacing region at first overlap region; and projection of first planarization portion onto base overlaps with first overlap region at second overlap region.

Display substrate having planarization layer covering spacing region between signal lines, manufacturing method thereof and display apparatus

An array substrate is provided, comprising a plurality of signal lines; wherein a respective signal line of the plurality of signal lines comprises a first portion in a first area and a second portion in a second area, the first portion and the second portion being in different layers; second portions of the plurality of signal lines are grouped into a plurality of pairs, a respective pair comprising a first-second portion and a second-second portion of two adjacent signal lines of the plurality of signal lines; and an orthographic projection of the first-second portion on a base substrate and an orthographic projection of the second-second portion on the base substrate at least partially overlap with each other.

Array substrate and display apparatus

A display panel and a display device are disclosed. The display panel includes display area and a peripheral area surrounding the display area. The peripheral area includes a first peripheral area located at a side of the display area, the first peripheral area has a cell test area for arranging a cell test unit, the display panel has a first edge, and the first edge is located at a side of the first peripheral area away from the display area. The display panel is provided with a reference power bus and a touch signal line, and in the first peripheral area, the reference power bus has a reference power bus protrusion.

Display panel and display device

An array substrate is provided. The array substrate includes a plurality of first reset signal lines configured to provide a plurality of first reset signals, a plurality of second reset signal lines configured to provide a plurality of second reset signals, a plurality of third reset signal lines, and a plurality of first connecting lines. A respective first reset signal line is connected to a row of first connecting lines, which in turn are connected to source electrodes of first reset transistors in a row of subpixels, respectively. The plurality of second reset signal lines and the plurality of third reset signal lines form an interconnected reset signal supply network. A respective second reset signal line is connected to one or more of the plurality of third reset signal lines. A respective third reset signal line is connected to one or more of the plurality of second reset signal lines.

An array substrate is provided. The array substrate includes a base substrate, and a plurality of pixel driving circuits configured to drive light emission in a plurality of subpixels. A respective pixel driving circuit includes a driving transistor; a compensation transistor configured to provide a compensation voltage signal to a gate electrode of the driving transistor; the compensation transistor including a source electrode, a drain electrode and a gate electrode; a node connecting line in a first signal line layer; a first pad in a second signal line layer on a side of the first signal line layer away from the base substrate; a voltage line configured to output a constant voltage signal; and a voltage connecting line electrically connecting the first pad with the voltage line. The node connecting line connects the gate electrode of the driving transistor and a drain electrode of the compensation transistor.

A display substrate and a display panel, the display substrate includes a base substrate and a plurality of sub-pixels, a plurality of data lines and a plurality of data wirings located on the base substrate. The plurality of data wirings includes a first data wiring, a second data wiring and a third data wiring that are periodically arranged. The first data wiring is located in a first conductor layer. The second data wiring is located in a second conductor layer. The third data wiring is located in a third conductor layer. An orthographic projection of a part of at least one first data wiring on the base substrate overlaps with an orthographic projection of a part of at least one third data wiring on the base substrate.

Display substrate and display panel with overlapping conductor layer in peripheral area

Provided are a display panel and a display device. The display panel includes: a base substrate, including a display region and a peripheral region, the peripheral region being located on at least one side of the display region; a plurality of sub-pixels, located in the display region; a plurality of constant voltage lines, arranged in a first direction, each of the plurality of constant voltage lines extending in a second direction, the constant voltage line being at least partially located in the display region, and the first direction intersecting with the second direction; and a conductive line, located in the peripheral region, and connected with the plurality of constant voltage lines, the plurality of constant voltage lines being configured to provide a constant voltage to the plurality of sub-pixels.

A display substrate and a display device are provided. The display substrate includes a base substrate, at least one group of contact pads, a plurality of first light-emitting elements, a plurality of first pixel driving circuits, a plurality of connecting traces, a plurality of data lines and a plurality of leads. The display area includes a first display area and a second display area; the first light-emitting elements are located in the first display area; the first pixel driving circuits are located in the second display area; the leads are located in the first display area and the peripheral area, and connect the data lines and the at least one group of contact pads; orthographic projections of the first light-emitting elements on a substrate surface of the base substrate are at least partly overlapped with orthographic projections of the leads on the substrate surface of the base substrate.

Display substrate and display device

A display substrate includes a display region and a non-display region surrounding the display region. The display substrate further includes: a plurality of scanning lines, a plurality of data lines, and a plurality of data fanout lines, at least a part of each data fanout line being located at the non-display region. Each data fanout line is coupled to a corresponding data line, the plurality of data fanout lines includes a plurality of first data fanout lines and a plurality of second data fanout lines, the first data fanout lines are arranged at a same layer, and made of a same material, as the scanning lines, and the second data fanout lines are arranged at a same layer, and made of a same material, as the data lines.

A method and an apparatus for constructing a three-dimensional channel, and a non-transitory computer-readable recording medium are provided. In the method, a depth image corresponding to a first panoramic image is generated. Then, channel object detection is performed on the first panoramic image to obtain channel object boxes in the first panoramic image. Each of the channel object boxes is four annularly interconnected arc-shaped sides, and each of the arc-shaped sides is a circular arc of a great circle. Then, a three-dimensional point cloud of a channel object in the first panoramic image is generated based on the first panoramic image, the channel object boxes and the depth image.

Method and apparatus for constructing three-dimensional channel, and non-transitory computer-readable recording medium

A display panel and a display device are provided. The display panel includes: a display region; a peripheral region surrounding the display region; a plurality of pixel units, located in the display region and configured to display an image; a plurality of data lines, electrically connected with the plurality of pixel units and configured to input data signals to the plurality of pixel units; a plurality of data transmission lines, located in the peripheral region and connected with the plurality of data lines; and at least two repair structures, wherein each of the at least two repair structures includes a first repair line and a second repair line, the first repair line is overlapped with the plurality of data transmission lines, and the second repair line is overlapped with the plurality of data lines.

Display panel with repair structure and display device

A display substrate includes: a base substrate and a plurality of sub-pixels arranged on the base substrate, the sub-pixel include a sub-pixel driving circuit, the sub-pixel driving circuit includes: a first transistor, a driving transistor, and a first conductive connection portion; a first electrode of the first transistor is coupled to a second electrode of the driving transistor, a second electrode of the first transistor and a first end portion of the first conductive connection portion are arranged at different layers, the second electrode of the first transistor and the first end portion of the first conductive connection portion are coupled through a via hole; a second end portion of the first conductive connection portion is coupled to a gate electrode of the driving transistor.

A method and an apparatus for determining a connection relation of subspaces, and a non-transitory computer-readable recording medium are provided. In the method, a plurality of sets of panoramic images respectively corresponding to two respective adjacent subspaces are obtained. Each set of the panoramic images includes two first panoramic images, and a second panoramic image photographed at a connection opening. Orientations of the connection openings are determined based on positions of the connection openings, and orientations of a camera. Relative positions of the two adjacent subspaces are determined based on correspondence relations between the two first panoramic images and parts of the respective second panoramic images. The connection relation of the subspaces is determined based on the connection relation determined based on the same subspace, the orientations of the connection openings, and the relative positions of the two adjacent subspaces.

Method and apparatus for determining connection relation of subspaces, and non-transitory computer-readable recording medium

Disclosed is an image processing method including steps of obtaining a plurality of sets of training data, each set of training data containing data of first and second images, image quality of the second image being higher than that of the first image, shooting contents of the first image being the same model, letting the data of the first image be an input of the model, and utilizing the plurality of sets of training data to train the model until a difference feature value between an output of the model and the data of the second image is minimum; and inputting data of a third image to be processed into the model so as to output data of a fourth image after image enhancement, image quality of the fourth image being higher than that of the third image.

Image enhancement model training data generation for panoramic images

Disclosed are an image matching method and apparatus. The image matching method is inclusive of steps of obtaining a panoramic image of at least one subspace in a 3D space and a 2D image of the 3D space; acquiring a 2D image of the at least one subspace in the 3D space; performing 3D reconstruction on the panoramic image of the at least one subspace, and procuring a projection image corresponding to the panoramic image of the at least one subspace; and attaining a matching relationship between the panoramic image of the at least one subspace and the 2D image of the at least one subspace, and establishing an association relationship between the panoramic image of the at least one subspace and the 2D image of the at least one subspace between which the matching relationship has been generated.

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Beijing, China

Hong Yi