Samsung Electro-mechanics Co., Ltd.

Hong Won Kim

Tae Sung Jeong

Joon Seok Kang

Sung Yi

Young Do Kweon

Jingli Yuan

A fan-out semiconductor package includes a redistribution layer, an interconnection member, a semiconductor chip, and a protective layer. The interconnection member has a through hole disposed on the redistribution layer. The semiconductor chip is disposed on the redistribution layer exposed within the through hole. The protective layer is formed between the redistribution layer and the interconnection member, and coupled to the interconnection member to protect the interconnection member.

Fan-out semiconductor package and method of manufacturing same

The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof and provides a chip embedded printed circuit board including: an insulating layer having vias formed therethrough; a first chip and a second chip embedded in the insulating layer and having pads, which are respectively exposed to upper and lower surfaces of the insulating layer, on one surfaces thereof; an upper pattern formed on the upper surface of the insulating layer to be connected to the pads of the first chip and the vias; and a lower pattern formed on the lower surface of the insulating layer to be connected to the pads of the second chip and the vias. Also, the present invention provides a manufacturing method of a chip embedded printed circuit board.

Method of manufacturing a chip embedded printed circuit board

The present invention relates to a chip embedded printed circuit board and a manufacturing method thereof. The present invention provides the chip embedded printed circuit board including an insulating layer embedding a chip provided with posts at an upper part, vias formed through the insulating layer, upper patterns formed at the upper part of the insulating layer to be connected to the posts and the vias and lower patterns formed at a lower part of the insulating layer to be connected to the vias, and the manufacturing method thereof.

Disclosed herein is a die package including an encapsulated die, including: a die including pads on one side thereof; an encapsulation layer covering lateral sides of the die; a support layer covering the encapsulation layer and one side of the die; a passivation layer formed on the other side of the die such that the pads are exposed therethrough; and a redistribution layer formed on the passivation layer such that one part thereof is connected with the pad. Here, since one side of the die is supported by the support layer and the encapsulation layer is formed on only the lateral side of the die, the warpage of the die package due to the difference in thermal expansion coefficient can be minimized.

Growing community of inventors

Suwon-si, South Korea

Hong Won Kim