Qualcomm Incorporated

Other

Hong Sun Kim

Cheng-Han Wang

Liang Zhao

Jin-Su Ko

Yi Zeng

Jungdong Park

Jeremy Darren Dunworth

Prasad Srinivasa Siva Gudem

Jin Wook Kim

Dominic Gerard Farmer

Chirag Dipak Patel

Mohammad Bagher Vahid Far

Aleksandar Miodrag Tasic

Alireza Khalili

Jeongsik Yang

Ojas Choksi

Timothy Donald Gathman

Timothy Paul Pals

Young Gon Kim

I-Hsiang Lin

James Ian Jaffee

Gang Zhang

Wu-Hsin Chen

Sang-Oh Lee

Klaas Van Zalinge

Babak Soltanian

Sasha Vujcic

Paul Brian Sheehy

Kiyong Choi

I-Liang Lin

Ojas Mahendra Choksi

A radio frequency (RF) receiver, for example a satellite positioning system receiver, can be configured to use a single phase locked loop for generating an oscillator signal to perform downconversion of signals in two different frequency bands using two or more local oscillators. A first RF signal portion includes a first signal band and undergoes double downconversion using a first mixer and a second mixer, while a second RF signal portion includes a second signal band and undergoes single downconversion using a single mixer. A controller is configured to determine a first oscillator divider value and a second oscillator divider value to avoid a jammer frequency and frequency dividers are used to generate the two or more local oscillators.

Concurrent support for multiple frequency bands for satellite navigation signals

A method and apparatus are disclosed for a configurable mixer capable of operating in a linear, a legacy, and a low-power mode. In the linear mode, the configurable mixer is configured to operate as a double-balanced mixer to multiply a first differential signal by a second differential signal. In the legacy mode, the configurable mixer is configured to as a double-balanced mixer to multiply a differential signal by a single-ended signal. In the low-power mode, the configurable mixer is configured to operate as a single-balanced mixer to multiply a differential signal by a single-ended signal. The operating mode of the configurable mixer may be based, at least in part, on a mode control signal. In some embodiments, the configurable mixer may be included in an analog front end of a wireless communication device.

Configurable mixer

The present disclosure includes switching resonant filter circuits and methods. In one embodiment, a circuit includes a plurality of resonant switching circuits arranged in a three (3) or four (4) element PI network. In one embodiment, an undesired signal frequency is applied to two resonant switching circuits and a carrier frequency of an RF signal is applied to the other two resonant switching networks so that the network attenuates the undesired signal frequency and passes the carrier frequency. In another embodiment, the resonant switching circuits are configurable to shift a peak impedance so that undesired signals may be attenuated.

Switching resonator filter circuits and methods

An apparatus includes a first bias circuit configured to generate a first current that varies with temperature according to a first slope. The apparatus also includes a second bias circuit configured to generate a second current that varies with temperature according to a second slope. The apparatus further includes a low noise amplifier including a transconductance stage that is responsive to an output of the first bias circuit. The apparatus also includes a load coupled to an output of the low noise amplifier and responsive to an output of the second bias circuit.

Temperature dependent amplifier biasing

A circuit for performing a residual side band calibration is described. The circuit generally includes a phase imbalance detection circuit. The phase imbalance detection circuit may include a limiter. The phase imbalance detection circuit may be independent of gain imbalance. The circuit may also include a phase imbalance correction circuit. The phase imbalance detection circuit may control coupling between an inphase path and a quadrature path.

Phase imbalance calibration

A global navigation satellite system (GNSS) receiver includes at least one GNSS antenna configured to receive input signaling from at least a first GNSS source and a second GNSS source; an in-phase/quadrature (I/Q) mixer coupled to the at least one GNSS antenna and configured to process the input signaling to obtain complex intermediate signaling; a first complex filter coupled to the I/Q mixer and configured to filter the complex intermediate signaling with respect to a first frequency range to obtain first real output signaling; a second complex filter coupled to the I/Q mixer and configured to filter the complex intermediate signaling with respect to a second frequency range to obtain second real output signaling; and a signal combiner coupled to the first and second complex filters and configured to generate combined real output signaling by combining the first real output signaling and the second real output signaling.

Concurrent multi-system satellite navigation receiver with real signaling output

Systems, apparatus and methods in a mobile device to multiplex two global navigation satellite system (GNSS) signals on a single hardware receiver chain are presented. The GNSS signals may come from a common GNSS system on two bands of two different GNSS systems overlapping on a common band. A duty cycle of the GNSS signals may be based on a harmonic being within one of the first band and the second band. The duty cycle may be based on signal quality, such as indicating a jammed or non jammed signal. The duty cycle may be of unequal proportions and less than 100% such that the receiver chain is idle for a percentage of time.

Method and apparatus for receiving navigation satellite signals from two bands

Certain aspects of the present disclosure provide methods and apparatus for performing quadrature combining and adjusting. One example circuit may include first through fourth mixing circuits. The first mixing circuit may multiply a radio frequency signal with a first local oscillating signal to generate a first frequency converted signal. The second mixing circuit may multiply a radio frequency (RF) signal with a second local oscillating signal, which may be about 90&#xb0; out of phase with the first local oscillating signal, to generate a second frequency converted signal. The third and fourth mixing circuits may multiply the RF signal with the second and first signals, respectively, to generate third and fourth frequency converted signals, respectively. A first combining circuit may combine the first and third frequency converted signals, and a second combining circuit may combine the second and fourth frequency converted signals.

Quadrature combining and adjusting

A wireless communication device configured for receiving multiple signals is described. The wireless communication device includes a single-chip carrier aggregation receiver architecture. The single-chip carrier aggregation receiver architecture includes a first antenna, a second antenna, a third antenna, a fourth antenna and a transceiver chip. The transceiver chip includes multiple carrier aggregation receivers. The single-chip carrier aggregation receiver architecture reuses at least one of the carrier aggregation receivers for secondary diversity.

Reusing a single-chip carrier aggregation receiver to support non-cellular diversity

Methods and circuits can down convert at least a first RF signal on a first path in a first frequency band to provide a first IF signal. A second RF signal on second path in a second frequency band can be down converted to provide a second IF signal. The first IF signal and the second IF signal are interspersed in the frequency domain, and the first frequency band is different from the second frequency band. A combiner can combine at least part of the first IF signal and the second IF signal to provide a combined signal on an output signal path for reception by a digital processing circuit. The first IF signal or second IF signal can be a Zero IF (ZIF), very low IF (VLIF), or Low IF (LIF) signal.

Simultaneous signal receiver with interspersed frequency allocation

An integrated circuit is disclosed. The integrated circuit includes a primary coil. The integrated circuit also includes a first secondary coil that acts as a first transformer with the primary coil. The integrated circuit further includes a second secondary coil that acts as a second transformer with the primary coil. The primary coil, the first secondary coil and the second secondary coil have a layout on the integrated circuit to minimize coupling between the first secondary coil and the second secondary coil.

Single differential transformer core

A reconfigurable LNA for increased jammer rejection is disclosed. An exemplary embodiment includes an LNA having a tunable resonant frequency, and a detector configured to output a control signal to tune the resonant frequency of the LNA to increase jammer suppression. An exemplary method includes detecting if a jammer is present, tuning a resonant frequency of an LNA away from the jammer to increase jammer rejection if the jammer is present, and tuning the resonant frequency of the LNA to a selected operating frequency if the jammer is not present.

Reconfigurable LNA for increased jammer rejection

Systematic IM2 calibration for a differential LNA is disclosed. In an aspect, an apparatus includes an amplifier configured to output an amplified signal having a level of systematic pre-mixer IM2 distortion, a detector configured to detect the level of the systematic pre-mixer IM2 distortion in the amplified signal, and a bias signal generator configured to generate at least one bias signal configured to adjust the amplifier to reduce the level of the systematic pre-mixer IM2 distortion.

Systematic intermodulation distortion calibration for a differential LNA

Methods and apparatus for self testing a multiband voltage controlled oscillator (VCO) are disclosed. A tuning voltage of the VCO is adjusted where the output of the VCO does not affect the input to the VCO. Frequency bands in the VCO are selected. Output frequencies of the VCO are measured.

Systems and methods for self testing a voltage controlled oscillator in an open loop configuration

Techniques for generating oscillator signals in a wireless communication device are described. A phase-locked loop (PLL) may be used to generate an oscillator signal for a selected frequency channel. Different PLL settings may be used for the blocks in the PLL for different frequency channels. The different PLL settings may be for different PLL loop bandwidths, different amounts of charge pump current, different frequency equations associated with different sets of high and low divider ratios, different frequency division schemes associated with different prescaler ratios and/or different integer divider ratios, high side or low side injection for a super-heterodyne receiver or transmitter, and/or different supply voltages for one or more circuit blocks such as an oscillator. A suitable set of PLL settings may be selected for each frequency channel such that adverse impact due to spurs can be mitigated.

Growing community of inventors

San Jose, CA, United States of America

Hong Sun Kim