Samsung Electronics Co., Ltd.

Hong-sik Shin

In-Keun Lee

Heung-sik Park

Do-haing Lee

Seung-ho Chae

Ha-young Choi

Sang-Hyun Lee

Sung-woo Kang

Young-Mook Oh

Do-hyoung Kim

Seung-Min Lee

Doo-Young Lee

Jeon-Il Lee

Hak-yoon Ahn

Hyon-wook Ra

Seo-bum Lee

Seong-han Oh

Won-hyuk Lee

An integrated circuit device is provided. The integrated circuit device includes a fin-type active region that extends in a first direction on a substrate, a gate structure that intersects with the fin-type active region and extends in a second direction, perpendicular to the first direction, on the substrate, and a first contact structure that is disposed on the gate structure, and has a greater width at a top surface than a bottom surface thereof.

Method of manufacturing integrated circuit device

Integrated circuit device

An etching method includes providing a plasma of a first treatment gas to an etching-object to form a deposition layer on the etching-object, the first treatment gas including a fluorocarbon gas and an inert gas, and the etching-object including a first region including silicon oxide and a second region including silicon nitride, providing a plasma of an inert gas to the etching-object having the deposition layer thereon to activate an etching reaction of the silicon oxide, wherein a negative direct current voltage is applied to an opposing part that is spaced apart from the etching-object so as to face an etching surface of the etching-object, the opposing part including silicon, and subsequently, providing a plasma of a second treatment gas to remove an etching reaction product, the second treatment gas including an inert gas and an oxygen-containing gas.

Etching method and methods of manufacturing semiconductor device using the same

A semiconductor device may include a substrate including a fin active region extending in a first direction, a gate structure crossing the fin active region and extending in a second direction crossing the first direction, source/drain regions on the fin active region at opposite sides of the gate structure, a first contact structure electrically connected to one of the source/drain regions, a pair of first contact block structures on opposite first sidewalls, respectively, of the first contact structure in the second direction.

Integrated circuit devices and methods of manufacturing the same

Provided is a semiconductor device having an enhanced characteristic and a resistor structure satisfying a desired target resistor value of a resistor device. A semiconductor device includes: a lower interlayer insulating layer disposed on a substrate comprising a resistor area; a resistor structure comprising a resistor layer and an etch stop pattern sequentially stacked on the lower interlayer insulating layer of the resistor area; an upper interlayer insulating layer configured to cover the resistor structure and disposed on the lower interlayer insulating layer; a resistor contact structure configured to pass through the upper interlayer insulating layer and the etch stop pattern and contact the resistor layer; and a resistor contact spacer disposed between the upper interlayer insulating layer, the etch stop pattern, and the resistor contact structure.

Semiconductor device including resistor structure

Growing community of inventors

Seoul, South Korea

Hong-sik Shin