Samsung Electronics Co., Ltd.

Hong-Seon Hwang

Jong-Hyun Choi

Kyoung-Ho Kim

Young-Taek Lee

Jin-Man Han

A sense amplifier control circuit for controlling the voltage applied to a sense amplifier and a memory cell by setting the voltage as a given level (in this case, 4 V) is provided. The sense amplifier control circuit being inputted by the voltage applied to the sense amplifier and the memory cell thereto and generating the output voltage to the gate of the sense amplifier driver includes a comparator for operating whenever the voltage applied to the sense amplifier and memory cell is varied, a level shift circuit for converting an internal power voltage into an external power voltage, a trigger circuit, a driver control circuit and a bias circuit for constantly maintaining the current flowing into the driving element of the driver control circuit. Therefore, the voltage applied to the sense amplifier and memory cell come to have an appropriate rising slope, and after reached to the given level, the control circuit controls the level to be continuously maintained. Consequently, the wrong operation of a chip and the power noise is reduced, to thus improve the reliability of a semiconductor memory device.

Sense amplifier control circuit of a semiconductor memory device

A back-bias level sensor used for a semiconductor device wherein a sensing current for sensing a back-bias voltage is prevented from directly flowing into the substrate (or the back-bias voltage terminal). The gate of a PMOS transistor is provided with the back-bias voltage while the source is provided with a ground voltage, so that a pump circuit performs the pumping operation to increase the back-bias voltage when the back-bias voltage is lower than a predetermined voltage level; otherwise, the pump circuit is de-energized, thereby reducing the back-bias voltage.

Growing community of inventors

Suwon, South Korea

Hong-Seon Hwang