Samsung Electronics Co., Ltd.

Lsis Co., Ltd.

Ls Electric Co., Ltd.

Hong-Seok Kim

Chun-Suk Yang

Hee Seok Kim

Jeongwook Kim

Suk-jin Kim

Soo-jung Ryu

Jeong-Wook Kim

Chang-Woo Baek

Chan-Hoon Park

Suk Jin Kim

Moon-Sang Lee

Seung-Hyun Kim

Bong-Jin Yum

Kwan-Woo Kim

Sang-Won Kim

Soojung Ryu

Dong-hoon Yoo

Young-Kwan Kim

Kyoung June Min

Soo Jung Ryu

Jun-jin Kong

Jeong Wook Kim

Jae-Moon Lee

Jeong-Un Choi

Dong-Sik Kim

Jong Myon Kim

Byoung-soo Ko

Taisong Kim

Hyung-Chul Lee

Tae-Ho Yoon

A diagnosing device of a three phase inverter is provided, which includes a relay connected in series with a capacitor disposed on a DC link, an initial charging resistor connected in parallel to the relay, an inverter comprising a switching device for controlling a power supply to three phase output lines, a current sensor disposed on a connection line connecting between the DC link and the inverter to sense a current, and a control unit for driving the switching device and diagnosing at least one of opening and shorting of the switching device according to whether the current is sensed or not.

Diagnosing device of three phase inverter

The present disclosure relates to a motor-driving device with an improved structure of a circuit module. According to the present disclosure, the boards are coupled to each other via a connector or a bolt. This removes wires use, and reduces an assembly tolerance, thereby to improve the device productivity.

Device for driving motor

The present invention relates to an apparatus for correcting a temperature sensing signal of an IGBT temperature sensing device which outputs only a temperature sensing signal having a voltage value equal to or higher than a preset voltage value, by using an output limiting diode. The apparatus includes: a calculating part configured to calculate a conduction current value of the output limiting diode by using the resistance of an NTC thermistor included in the IGBT temperature sensing device; a determining part configured to determine a drop voltage value of a voltage drop occurring in the output limiting diode based on the conduction current value; and a correcting part configured to correct the temperature sensing signal by increasing the voltage of the temperature sensing signal output from the IGBT temperature sensing device by the drop voltage value.

Apparatus for correcting of temperature measurement signal

Disclosed herein is a method for controlling a trip event of an inverter by taking into account the temperature of the inverter. The method includes: sensing a change in temperature of the inverter for an overload current measurement time using the temperature sensing circuit; determining an amount of heat emitted from the inverter based on the change in temperature; determining an electrical energy of the inverter consumed for the overload current measurement time; determining a compensation reference time based on the amount of heat and the electrical energy; and comparing the compensation reference time with the overload current measurement time to trip the inverter. As a result, the actual temperature of the inverter measured when the inverter is in operation is reflected, so that the trip event of the inverter can be controlled more accurately.

Method for controlling trip event of inverter

A compiling method and a processor using the same are provided. The compiling method includes simulating a first program code which includes at least one first operation command to generate a first operation result, compiling the first program code to generate a second program code which includes at least one second operation command, simulating the second program code to generate a second operation result, and comparing the first operation result with the second operation result to verify whether the second program code is valid.

Compiling method and processor using the same

A loop coalescing method and a loop coalescing device are disclosed. The loop coalescing method comprises removing an inner-most loop from among nested loops, so that an outer operation provided outside of the inner-most loop is performed when a condition of a conditional statement is satisfied, generating a guard code by applying an if-conversion method to the conditional statement, and converting a guard by using an instruction calculating the guard of the guard code, the instruction calculating the guard using a register where information related to a period of time corresponding to the number of iterations of the inner-most loop is stored.

Loop coalescing method and loop coalescing device

Provided is a processor and method of performing speculative load instructions of the processor in which a load instruction is performed only in the case where the load instruction substantially accesses a memory. A load instruction for canceling operations is performed in other cases except the above case, so that problems occurring by accessing an input/output (I/O) mapped memory area and the like at the time of performing speculative load instructions can be prevented using only a software-like method, thereby improving the performance of a processor.

Processor and method of performing speculative load operations of the processor

A measurement system and a measurement method, which can obtain a measurement value close to a true value considering an overlay measurement error according to a higher order regression analysis model. The measurement system and the measurement method provide a technique for determining optimal positions of shots to be measured using an optimal experimental design. When the regression analysis model and the number of shots to be measured are determined in advance, a method is used for determining an optimal number of shots to be measured according to the regression analysis model and process dispersion using a confidence interval estimating method. A dynamic sampling method is used for dynamically changing the number and positions of shots to be measured according to a change in process features by combining the above two methods. And, when erroneous data is detected, or when measured data is missing, a robust regression analysis method and a technique for filtering the erroneous data and the missing data are used.

Measurement system for correcting overlay measurement error

A data processing system and method. The data processing system includes a processor core that executes a program; a loop accelerator that has an array consisting of a plurality of data processing cells and executes a loop in a program by configuring the array according to a set of configuration bits; and a centralized register file which allows data used in the program execution to be shared by the processor core and the loop accelerator. The loop accelerator divides the configuration of the array into at least three phases according to whether data exchange with the central register file is conducted during the loop execution. Thus, unnecessary occupation of the routing resource, which is used for the data exchange between the loop accelerator and the central register file during the loop execution, can be avoided.

Loop data processing system and method for dividing a loop into phases

A measurement system and a measurement method, which can obtain a measurement value close to a true value considering an overlay measurement error according to a higher order regression analysis model, is disclosed. The measurement system and the measurement method provide a technique for determining optimal positions of shots to be measured using an optimal experimental design. When the regression analysis model and the number of shots to be measured are determined in advance, a method is used for determining an optimal number of shots to be measured according to the regression analysis model and process dispersion using a confidence interval estimating method.

A memory access method includes: obtaining a, b, and c from a program code for accessing a memory with a triple loop in a program, a being a number of values which an inner-most loop variable of the triple loop may have, b being a number of values which a middle loop variable of the triple loop may have, and c being a number of values which an outer-most loop variable of the triple loop may have; obtaining a starting address of the memory accessed by the triple loop; and obtaining an a&#xd7;b&#xd7;c number of addresses of the memory accessed by the triple loop using the starting address and a function.

Memory access method using three dimensional address mapping

An apparatus and a method are provided for a parallel processing very long instruction word (VLIW) computer. The apparatus includes: an index code generation unit sequentially generating an index code, which is associated with a number of no operation (NOP) instruction word between effective instruction words, with respect to each of instruction word groups to be executed in a VLIW computer; an instruction compression unit sequentially deleting the NOP instruction word which corresponds to the index code with respect to each of instruction word groups; and an instruction word conversion unit converting the effective instruction words to include the index code, the effective instruction words corresponding to the NOP instruction words.

Apparatus for compressing instruction word for parallel processing VLIW computer and method for the same

Disclosed is a data processing system and method. The data processing method determines the number of static registers and the number of rotating registers for assigning a register to a variable contained in a certain program, assigns the register to the variable based on the number of the static registers and the number of the rotating registers, and compiles the program. Further, the method stores in the special register a value corresponding to the number of the rotating registers in the compiling operation, and obtains a physical address from a logical address of the register based on the value. Accordingly, the present invention provides an aspect of efficiently using register files by dynamically controlling the number of rotating registers and the number of static registers for a software pipelined loop, and has an effect capable of reducing the generations of spill/fill codes unnecessary during program execution to a minimum.

Register allocation method and system for program compiling

Provided are a loop accelerator and a data processing system having the loop accelerator. The data processing system includes a loop accelerator which executes a loop part of a program, a processor core which processes a remaining part of the program except the loop part, and a central register file which transmits data between the processor core and the loop accelerator. The loop accelerator includes a plurality of processing elements (PEs) each of which performs an operation on each word to execute the program, a configuration memory which stores configuration bits indicating operations, states, etc. of the PEs, and a plurality of context memories, installed in a column or row direction of the PEs, which transmit the configuration bits along a direction toward which the PEs are arrayed. Thus, a connection structure between the configuration memory and the PEs can be simplified to easily modify a structure of the loop accelerator so as to extend the loop accelerator.

Growing community of inventors

Seongnam-si, South Korea

Hong-Seok Kim