Micron Technology Incorporated

Skhynix Inc.

Sk Hynix Memory Solutions Inc.

Hong Lu

Kishore Kumar Muchherla

Sampath K Ratnam

Vamsi Pavan Rayaprolu

Shuhui Chen

Karl David Schuh

Jiangang Wu

Guang Chang Ye

Jianmin Huang

Xiangang Luo

Deping He

Johnson Yen

Kulachet Tanpairoj

Chun Sum Yeung

Xiaolai Zhu

Suneel Indupuru

Gong Luo

Nahir Sarmicanic

A method includes writing, to a first data structure, indices corresponding to address locations of a logical-to-physical (L2P) data structure that maps a plurality of logical block addresses (LBAs) associated with the L2P data structure, initiating performance of a media management operation involving one or more memory blocks in which data associated with the LBAs is written, and refraining from rewriting particular entries in the L2P table that correspond to LBAs whose index in the first data structure is a particular value during performance of the media management operation.

Virtual indexing in a memory device

A program operation is executed on a memory sub-system. In response to receiving a request to execute a read operation, executing a first program suspend operation to suspend the program operation. In response to a completion of the read operation, a program resume operation is executed to resume execution of the program operation. A delay period is established following execution of the program resume operation during which execution of the program operation is completed. A second program suspend operation is executed following the delay period.

Establishing a delay period associated with a program resume operation of a memory subsystem

A program operation is executed on a memory sub-system. During execution of the program operation, a request to execute a read operation on the memory sub-system is received. In response to receiving the request, a program suspend operation to suspend the program operation is executed. The read operation is executed on the memory sub-system in response to a completion of the program suspend operation. In response to completion of the read operation, a program resume operation is executed. A program suspend delay period is established following execution of the program resume operation during which a subsequent read operation is stored in a queue.

Management of program suspend and resume operations of a memory sub-system

A single instruction is received to read a read address in storage in order to obtain read data and write the read data to a write address in the storage. Error correction decoding is performed in order to obtain user data. Error correction parity information is generated based at least in part on (1) the user data and (2) new metadata associated with the write address, without buffering the user data between the error correction decoding and the generation of the error correction parity information. The user data, the new metadata, and the error correction parity information are stored in the write address in the storage.

Accelerated data copyback

Data associated with logical addresses are received where the data is to be stored on a plurality of solid state storage dies and each of the plurality of solid state storage dies is independently accessible. Metadata is generated that includes the logical addresses where the metadata and the data sum to an amount of information that is less than a maximum amount of information that can be written to the plurality of solid state storage dies in a single write operation. The metadata and the data are stored in the plurality of solid state storage dies.

Sub-blocks and meta pages for mapping table rebuild

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Hong Lu