Samsung Display Co., Ltd.

Hong-Joon Moon

Jun-Seok Lee

Hong-Beom Lee

Soo-Chul Kim

Sang-Hyun Kang

Ho-Jun Lee

Kweon-Sam Hong

Young-Min Jung

Sang-Yeoul Lim

You-Hyun Jeong

A display substrate includes a first gate line configured to receive a first gate clock, a second gate line adjacent to the first gate line and configured to receive a second gate clock, a first data line configured to transfer a first data signal inverted according to the first gate clock and the second gate clock, where the first data signal has a first polarity, a second data line configured to transfer a second data signal inverted according to the first gate clock and the second gate clock, where the second data signal has a second polarity different from the first polarity, a first pixel including a first high sub pixel electrically connected to the first gate line and the first data line, and a first low sub pixel electrically connected to the first gate line and the second data line.

Display substrate, method of testing the display substrate and display apparatus having the display substrate

A display substrate includes a first switching element, an organic layer disposed on the first switching element, a capping layer disposed on the organic layer and a cover electrode covering the first emission hole. The first switching element is electrically connected to a gate line extending in a first direction, a data line extending in a second direction crossing the first direction and the pixel electrode disposed adjacent to the data line. The capping layer includes a first emission hole. The cover electrode overlaps the gate line as a first width. The cover electrode overlaps the first switching element as a second width. The second width is smaller than the first width.

Display substrate and method of manufacturing the same

In a display panel and a method of manufacturing the same, the display panel includes a first display substrate, a second display substrate and a sealing member. The first display substrate includes a first alignment layer in a first display region and a first peripheral region of a first base substrate, and a first backflow-blocking pattern in the first peripheral region and having a curvature to surround a vertex portion of the first display region. The second display substrate includes a second alignment layer in a second display region which faces the first display region and a second peripheral region of a second base substrate. The sealing member includes a corner portion having substantially the same curvature as the first backflow-blocking pattern to surround an outline of the first and second peripheral regions.

Display panel and method of manufacturing the same

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Cheonan-si, South Korea

Hong-Joon Moon