Mediatek Corporation

Mediatek Incorporation

Hong-Ching Chen

Wen-Yi Wu

Der-Tsuey Shen Wang, Legal Representative

Chang-Po Ma

Chi-Ming Chang

Kuo-Cheng Lu

Yao-Chun Su

Chun-Yuan Chu

Chi-Wei Peng

Chin-Ling Hung

Shin-Shiun Chen

Chen-Hao Chang

Li-Lien Lin

Li-Chun Tu

Jyh-Shin Pan

Bing-Yu Hsieh

Chao-Long Tsai

Yi-Chuan Chen

Meng-Hsueh Lin

Jeng-Horng Tsai

Yih-Shin Weng

Xiaorong Qu

Tzu-Chieh Lin

Wen-Zen Shen

Chien-Chung Wu

Yeow-Chyi Chen

Yi-Chiuan Wang

Examples of methods of synchronized mode of flow table and apparatus using the same are described. A method may involve receiving a first key associated with a first flow engine through a first port and a second key associated with a second flow engine through a second port. The method may also involve utilizing a match key in one or more flow entries in a flow table to obtain a first instruction for the first flow engine and a second instruction for the second flow engine.

Methods of synchronization mode of flow table and apparatus using the same

Examples of efficient MAC address storage are described, including methods and an apparatus. A method may involve obtaining a plurality of identifications associated with one or more applications executed on a computing apparatus, with each identification of the plurality of identifications different from one another. The method may also involve storing an identification entry representative of the plurality of identifications associated with the one or more applications. The identification entry may require an amount of memory space for storage less than an amount of memory space required to store the plurality of identifications associated with the one or more applications. The plurality of identifications may be a plurality of MAC addresses. The one or more applications may be one or more virtual machines.

Efficient MAC address storage for virtual machine applications

An electronic device has a management data input/output (MDIO) bus, a control unit, and an MDIO master. The control circuit receives a host command from a host device, and outputs a plurality of MDIO commands in response to the host command. The MDIO master receives the MDIO commands from the control circuit, and transmits the MDIO commands to the MDIO bus.

Electronic device with enhanced management data input/output control

An electronic device includes a control circuit and a bus interface. The control circuit packs a plurality of commands in a compound command frame. The bus interface communicates with another electronic device via a bus between the electronic device and the another electronic device, and packs the compound command frame in a single packet and transmits the single packet over the bus.

Electronic device for packing multiple commands in one compound command frame and electronic device for decoding and executing multiple commands packed in one compound command frame

The invention provides a method for performing copy back operations. First, a copy back command is sent to a flash memory for reading a first error correction code (ECC) data from a first address. The first ECC data is then received from the flash memory. The first ECC data is then decoded without performing error correction to calculate a fail count of the first ECC data. The fail count is then compared with a first threshold value. When the fail count is less than the first threshold value, a first program command is sent to the flash memory for storing the first ECC data to a second address of the flash memory. When the fail count is less than the first threshold value, the first ECC data is not sent back to the flash memory.

Method for performing copy back operations and flash storage device

A flash memory device includes a memory array and a memory control circuit. The memory array includes memory modules. Each memory module is located in a memory channel and includes a predetermined number of memory cells. The memory control circuit is coupled to the memory array via an address latch enable (ALE) pin and a command latch enable (CLE) pin. The ALE pin and the CLE pin are coupled to all of the memory cells and shared by all of the memory cells in the memory array.

Flash memory devices and methods for controlling a flash memory device

A system and method for printing a visible image onto an optical disc through tuning a driving signal of an optical pick-up unit are disclosed. The system includes a driving circuit, coupled to the optical pick-up unit, for providing a driving signal to drive the optical pick-up unit; and an adjusting circuit, coupled to the driving circuit, for controlling the driving circuit to adjust the driving signal according to a rotation source signal corresponding to a rotation of the optical disc.

System and method for printing visible image onto optical disc through tuning driving signal of optical pick-up unit

Disclosed is a clock generator for generating a target clock signal, which includes: a control circuit, receiving a reference clock signal, and for generating a clock enable signal and a delay selecting signal according to the reference clock signal; a delay module, coupled to the control circuit, for delaying the reference clock signal according to the delay selecting signal to generate a delayed reference clock signal; and a clock gating unit, coupled to the delay module and the control circuit, for receiving the delayed reference clock signal and the clock enable signal, and for passing the delayed reference clock signal according to the clock enable signal, to generate the target clock signal.

Clock generator, pulse generator utilizing the clock generator, and methods thereof

A method of managing data access of a storage medium includes establishing an address mapping table to record a physical address of a first data stored in the storage medium, where the physical address of the first data is mapped to a logical address of the first data; and when receiving a command for handling the first data stored in the storage medium internally, processing the address mapping table to serve the command without physically accessing the first data stored in the storage medium.

Methods of utilizing address mapping table to manage data access of storage medium without physically accessing storage medium and related storage controllers thereof

A clock generator for generating a target clock signal, comprising: a control circuit, receiving a reference clock signal, and for generating a clock enable signal and a delay selecting signal according to the reference clock signal; a delay module, coupled to the control circuit, for delaying the reference clock signal according to the delay selecting signal to generate a delayed reference clock signal; and a clock gating unit, coupled to the delay module and the control circuit, for receiving the delayed reference clock signal and the clock enable signal, and for passing the delayed reference clock signal according to the clock enable signal, to generate the target clock signal.

A system including a pulse generating module and a processing module is disclosed. The pulse generating module generates a target signal. The processing module outputs a processing signal according to the target signal. Throughput of the target signal exceeds throughput of the processing signal.

Chip and system utilizing the same

The invention provides a flash device. In one embodiment, the flash device comprises a first NAND flash integrated circuit, a second NAND flash integrated circuit, and a control integrated circuit. The control integrated circuit generates a plurality of first access signals with first timings to access the first NAND flash IC, and generates a plurality of second access signals with second timings to access the second NAND flash IC, wherein the first timings are different from the second timings. The first NAND flash integrated circuit then accesses data stored therein according to the first access signals. The second NAND flash integrated circuit then accesses data stored therein according to the second access signals.

Flash device and method for improving performance of flash device

A clock generator for generating a first target clock signal includes: a control circuit, receiving a reference clock signal, and for generating a first clock enable signal and a first delay selecting signal according to the reference clock signal; a first clock gating unit, coupled to the control circuit, for receiving the reference clock signal and the first clock enable signal, and for passing the reference clock signal according to the first clock enable signal to generate a first clock gated signal; and a first delay module, coupled to the first clock gating unit, for delaying the first clock gated signal according to the first delay selecting signal to generate the first target clock signal.

This invention provides an optical storage device for recording a plurality of data onto an optical storage medium. If recording interrupted, the optical storage device generates a data-interrupted address, and re-connects the interrupted data with a data re-connecting physical address. The optical storage device comprises a physical addressing module, a record-interrupt generator, a data recording controller, a data-interrupt address generator and a data-reconnecting physical address generator. The physical addressing module provides a reference physical address for recording data onto the optical storage medium. When detecting the interrupt of data recording, the data-interrupt address generator generates the address of the interrupted data. According to the address of the interrupted data, the data-reconnecting physical address generator generates a data-reconnecting physical address. The optical storage device utilizes the data-reconnecting physical address to continue to record the interrupted data onto the optical storage medium.

Device and method for connecting interrupted recording

Methods and apparatuses for generating error correction codes of a data block are disclosed. One proposed method includes: storing a plurality of calculating data corresponding to the error correction codes in a buffer; generating operating results according to the calculating data from the buffer and corresponding data of the data block; writing operating results into the buffer; and generating a plurality of updated calculating data according to the operating results stored in the buffer.

Growing community of inventors

Kao-Hsiung Hsien, Taiwan

Hong-Ching Chen