Ememory Technology Inc.

Accton Technology Corporation

Windbond Electronics Corp.

Hong-Chin Lin

Chien-Hung Ho

Jain-Hao Lu

Jie-Hau Huang

Nai-Hsien Chen

Shyh-Chyi Wong

Ching-Yuan Lin

Ming-Chih Hsieh

Guu-Chang Yang

Hsuan-Ching Chao

Po-Hsuan Huang

Cheng-Yuan Chang

Fu-Nian Liang

Yung-Hsien Chang

The present invention relates to both of a bi-stage correlation calculation demodulation system, and a fast walsh block demodulation device at a receiver, wherein the bi-stage correlation calculation demodulation system has a characteristic of bi-stage correlation calculation in which the subsequent second-stage correlation calculations are dependent on the first-stage correlation calculation results by utilizing an incomplete orthogonal property within CCK codewords to arrange the CCK codewords operated in the first-stage correlation calculations and second-stage correlation calculations properly and respectively. The fast walsh block demodulation device comprises: a plurality of adders (operators) constructed to be a first-level correlation calculation circuit and a second-level correlation calculation circuit, and a plurality of process modules constructed to be a third-level correlation calculation circuit, the process modules having the functions of picking one maximum value from four values and performing third-level correlation calculation of conventional basic fast walsh block demodulation device.

Complementary code keying demodulation system

Voltage generating apparatus includes a positive temperature coefficient current generating module, a negative temperature coefficient current generating module, a fine-tune current module and a voltage output module. The function of the positive temperature coefficient current generating module and the negative temperature coefficient current generating module, which take advantage of characteristics of MOS devices operated in the sub-threshold region, is to generate a stable current of positive temperature coefficient and a stable current of negative temperature coefficient, respectively. The current fine-tune module increases or decreases output current of the negative temperature coefficient current generating module. The voltage output module sums two output currents of the positive temperature coefficient current generating module and the negative temperature coefficient current generating module and transforms the total current into output voltage that is stable under temperature and process variation.

Voltage generating apparatus with a fine-tune current module

A four-phase dual pumping circuit has a number of stages according to the required output voltage based on an input voltage. Each stage has a first pumping unit and a second pumping unit that are mirror and identical to each other and electrically coupled to each other. The dual pumping circuit is controlled by four-phase clocks which are made from one pair of out of phase clocks. The transistors of the dual pumping circuit have special substrate connection to minimize body effects. The four-phase dual pumping circuit uses NMOSFETS for negative pumping and PMOSFETS for positive pumping.

Four-phase dual pumping circuit

A charge pump circuit has input and output nodes, a first transistor, a second transistor, a third transistor, a first capacitor, and a second capacitor. A drain of the first transistor and a drain of the second transistor are connected to the input node. A source of the second transistor and a drain of the third transistor are connected to the output node. The first capacitor is connected to a gate of the second transistor. The third transistor is connected to a substrate and a source of the second transistor. When the first transistor is turned on, a voltage at the input node will charge the first capacitor. When the second transistor is turned on, the third transistor is turned on simultaneously so that the substrate and the source of the second transistor will reach the same voltage level. Then, voltage at the input node will charge the second capacitor.

Charge pump circuit without body effects

A current-mode sense amplifier for detecting data stored in a flash memory cell. The sense amplifier has a first current generator for generating a first current to a first circuit according to current flowing out of the memory cell, a second current generator for generating a second current to a second circuit according to current flowing out of a reference cell, and a switch. When the switch is on and a common node of the first circuit and the second circuit is floating, the first and second circuits will generate equal initial voltages. When the switch is off and the common node of the first and second circuits is grounded, one of the initial voltages will increase, and the other initial voltage will decrease.

Current-mode sense amplifier with low power consumption

The present invention discloses a current comparator having simple, cheap and fast characteristics, especially discloses a current comparator having a small dead zone and excellent driving capability. The current comparator of the present invention comprises a first CMOS transistor, a second CMOS transistor, a diode-configured N-type transistor, a fourth CMOS transistor and a fifth CMOS transistor.

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Taipei, Taiwan

Hong-Chin Lin