National Semiconductor Corporation

Hon-Kai John Tam

Thomas W Thomson

A method for signed integer division. Typically, the two's complement of the dividend is stored as an adjusted dividend. The upper half of the adjusted dividend is shifted left one bit. The LSB of the upper half of the adjusted dividend is set equal to the MSB of the lower half of the adjusted dividend. The lower half of the adjusted dividend is shifted left one bit. The LSB of the lower half of the adjusted dividend is set equal to zero. A temporary register stores the result of subtracting a constant from the adjusted divisor. The temporary register is updated by subtracting it from the adjusted upper dividend, The adjusted divisor is subtracted from the adjusted dividend, then the adjusted dividend is shifted left one bit and stored in the upper half of the adjusted dividend. A temporary remainder is set equal to the upper half of the adjusted dividend. A first temporary quotient is set equal to the lower half of the adjusted dividend. A second temporary quotient is set equal to the first temporary quotient if the sign of the dividend and divisor are equal; if not, the second temporary quotient is set equal to the complement of the first temporary quotient. If the dividend is negative, the remainder is set equal to the temporary remainder; if not, the remainder is set equal to the complement of the temporary remainder. The quotient is then set equal to the second temporary quotient.

Method for performing signed division

A method for performing a rotate through carry operation utilizing a barrel shifter and a counter.

Method for performing rotate through carry using a 32 bit barrel shifter

A barrel shifter performs multi-bit shift and rotate operations on data of different lengths using multiplexors to preprocess the data prior to introducing the data to a transistor array.

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Sunnyvale, CA, United States of America

Hon-Kai John Tam