Mediatek Singapore Pte. Ltd.

Hon Cheong Hor

Tieng Ying Choke

Junmin Cao

A circuit for demodulating an input signal is described. The circuit may be configured to demodulate signals modulated with amplitude-based modulation schemes, such as amplitude shift keying (ASK). The demodulator may comprise a clock extractor configured to generate a clock signal in response to receiving an amplitude-modulated input signal, a phase shifter configured to generate a sampling signal by phase-shifting the clock signal by approximately &#x3c0;/2, and a sampler configured to sample the input signal in correspondence to one or more edges (such as one or more falling edges) of the sampling signal. In this way, the amplitude-modulated input signal may be sampled at its peak, or at least near its peak, thus ensuring high signal fidelity.

Circuits for amplitude demodulation and related methods

A circuit for demodulating an input signal is described. The circuit may be configured to demodulate signals modulated with amplitude-based modulation schemes, such as amplitude shift keying (ASK), such that information is encoded in the amplitude of the signals. The circuit may comprise an amplitude detector for extracting the envelope of a received amplitude-modulated signal, a phase/frequency detector for detecting phase and/or frequency shifts, and a selector configured to select one between the output of the amplitude detector and the output of the phase/frequency detector. The selector may be controlled by a control circuit including a delay unit.

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Singapore, Singapore

Hon Cheong Hor