Aixtron Ag

Aixtron, Inc.

Merck Patent Gesellschaft MIT Beschrankter Haftung

Merck Patent Gesellschaft MIT Beschraenkter Haftung

Holger Jurgensen

Meino Heyen

Ludwig Pohl

Herbert Schumann

Dietrich Erdmann

Uwe Hartmann

Wilfried Wassermann

Max E Van Ghemen

Gerd Strauch

Gerhard Karl Strauch

Armin Dadgar

Martin Hostalek

Alois Krost

Walter Franken

Frank Joseph

Dietmar Schmitz

Marc Deschler

Klaus Gruter

Pieter Balk

A process for depositing thin layers on a substrate in a process chamber arranged in a reactor housing, the bottom of the process chamber consisting of a temperable substrate holder which can be rotatably driven about its vertical axis, and the cover of the chamber consisting of a gas inlet element. The cover extends parallel to the bottom and forms, together with its gas outlets arranged in a sieve-type manner, a gas exit surface which extends over the entire substrate bearing surface of the substrate holder, the process gas being introduced into the process chamber through the gas exit surface. The process includes the step of varying the height of the process chamber, which is defined by the distance between the substrate bearing surface and the gas exit surface, before the beginning of the deposition process and/or during the deposition process.

Process for depositing thin layers on a substrate in a process chamber of adjustable height

A method for the production of coated substrates, such as OLEDs is disclosed, whereby at least one layer is deposited on the at least one substrate, by means of a condensation method and a solid and/or fluid precursor and, in particular, at least one sublimate source is used for at least one part of the reaction gases. The invention is characterized in that, by means of a temperature control of the reaction gases between precursor source(s) and substrate, a condensation of the reaction gases before the substrate(s) is avoided.

Coating method

This invention relates to a method for depositing III-V semiconductor layers on a non III-V substrate especially a sapphire, silicon or silicon oxide substrate, or another substrate containing silicon. According to said method, a III-V layer, especially a buffer layer, is deposited on the substrate or on a III-V germination layer, in a process chamber of a reactor containing gaseous starting materials. In order to reduce the defect density of the overgrowth, a masking layer consisting of essentially amorphous material is deposited directly on the III-V germination layer or directly on the substrate, said masking layer partially covering of approximately partially covering the germination layer. The masking layer can be a quasi-monolayer and can consist of various materials.

Process for depositing III-V semiconductor layers on a non-III-V substrate

A reaction chamber for carrying out substrate coating methods is disclosed, having at least one opening in at least one outer wall in which an HF feedthrough is inserted in a pressure or vacuum tight manner. The reaction chamber is further characterized by a combination of the following features: a support plate with coolant channels, and at least one opening for an HF line; an HF line collar in the zone disposed in the reaction chamber, a first seal on the collar; a first disc from an insulating material between a second seal on the support plate and the first seal on the collar; a thread in the zone outside the reaction chamber, a screw element being screwed onto the thread, all configured to prevent an electrical contact between the HF line and the support plate being established or an arc-over between the HF line and the support plate occurring.

Reaction chamber with at least one HF feedthrough

The invention relates to a method and device for depositing several crystalline semiconductor layers on at least one semiconductor crystalline substrate. According to said method, gaseous parent substances are introduced into a process chamber of a reactor by means of a gas inlet organ, said substances accumulating, optionally after a chemical gas phase and/or surface reaction, on the surface of a semiconductor substrate that is placed on a substrate holder in the process chamber, thus forming the semiconductor layer. Said semiconductor layer and the semiconductor substrate form a crystal consisting of either one or several elements from main group V, elements from main groups III and V, or elements from main groups II and VI. In a first process step for depositing a first semiconductor layer, a first process gas consisting of one or several first parent substances is introduced into the process chamber, the decomposition products of said gas forming the crystal of a first semiconductor layer and small quantities of a second parent substance can be introduced into the process chamber in order to dope the first semiconductor layer. The invention is characterized in that in a second process step, prior to or after the first process step, a second process gas, which contains the second parent substance and optionally additional gases, is introduced into said process chamber in order to deposit a second semiconductor layer, the decomposition products of said gas forming a second semiconductor layer, having a crystal that differs from that of the first semiconductor layer, whereby small quantities of a first parent substance can be introduced into the process chamber in order to dope the second semiconductor layer.

Method and device for depositing crystalline layers on crystalline substrates

A gas inlet for different reactant gases which flow into reaction vessels with high flow velocity. The cross sections of the gas inlet supply lines are substantially smaller than that of the reaction vessel. The gas inlet has a part with a conicoidal interior contour, the cross section of which is adapted to the cross section of the reaction vessel and which is arranged at one end of the reaction vessel through which flow occurs. The individual supply lines end at approximately the focal point of the part having the conicoidal interior contour. The gas exit openings of the supply lines are directed at the vertex of the part having the conicoidal interior contour.

Gas inlet for a plurality of reactant gases into reaction vessel

Disclosed is a process for fabricating mixed crystals and, in particular, III-V semiconductors, in which at least one component of the composition of the mixed crystal is transferred in a reactor from a source into a vapor phase containing hydrogen and chloride compounds as well as a carrier gas and mixed with said component or other components of said composition of said mixed crystal, transported to a substrate and precipitated on said substrate. The invented process is distinguished in that in order to vary the growth rate between approximately 1 &lt;m/h and approximately 500 &lt;m/h, the overall pressure is varied between approximately 80 mbar and approximately 1 mbar.

Material-saving process for fabricating mixed crystals

Process for producing doped semiconductor layers

In a process for the production of thin films and epitaxial layers by gas-phase deposition, intramolecularly stabilized organometallic compounds are employed as a source of metal.

Organometallic compounds

Quartz-glass reactor for MOCVD systems

An extraction valve head for a tank for high-purity and/or toxic liquid chemicals has an inlet valve for a filler gas, an outlet valve and a purging valve, which closes a bypass between a gas inlet line and an extraction line. The valves are configured as metal diaphragm valves and are fitted in a common metallic valve housing block. All valve seals of the valves are arranged in close spatial proximity to one another in the valve housing block.

Growing community of inventors

Aachen, Germany

Holger Jurgensen