Samsung Electronics Co., Ltd.

Hogeon Song

Seyoung Jeong

Jin-Woo Park

Do-Hyun Kim

Jongho Lee

Seokhyun Lee

Ho-jin Lee

Chungsun Lee

Kyung Suk Oh

Yongkwan Lee

Taeje Cho

Kyu-ha Lee

Sunpil Youn

Sunwon Kang

Kundae Yeom

SeYoung Jeong

An inspection system for a semiconductor package includes an inspection apparatus that includes a stage on which the semiconductor package is loaded, and a computer coupled to the inspection apparatus. The semiconductor package may include a first semiconductor chip and a second semiconductor chip on the first semiconductor chip, the computer may provide first identification information about the first semiconductor chip and second identification information about the second semiconductor chip, and the computer may control the inspection apparatus to selectively perform a package test process on one of the first and second semiconductor chips, the one of the first and second semiconductor chips being identified as a good chip based on the first identification information and the second identification information.

Inspection system and method for inspecting semiconductor package, and method of fabricating semiconductor package

In one embodiment, the semiconductor module includes a module substrate and a first substrate mounted on and electrically connected to a first surface of the module substrate. The first substrate has one or more first electrical connectors of the semiconductor module, and the first substrate electrically connecting the first electrical connector to the module substrate.

Semiconductor module adapted to be inserted into connector of external device

A method of fabricating a semiconductor device is provided. The method may include preparing a substrate having a first surface and a second surface, forming a via hole exposing at least a portion of the substrate from the first surface of the substrate, forming a first insulating film on an inner wall of the via hole, forming a conductive connection part filling an inside of the via hole including the first insulating film, polishing the second surface of the substrate until the conductive connection part is exposed, and selectively forming a second insulating film on the second surface of the substrate using an electrografting method to expose the conductive connection part.

Methods of fabricating semiconductor devices

A fan-out wafer level package may include at least two semiconductor chips; an insulating layer covering portions of a first semiconductor chip; a mold layer covering portions of a second semiconductor chip; a redistribution line pattern in the insulating layer; and/or an external terminal on the insulating layer. The first semiconductor chip may be stacked relative to the second semiconductor chip. The redistribution line pattern may be electrically connected to the at least two semiconductor chips. The external terminal may be electrically connected to the redistribution line pattern. A fan-out wafer level package may include at least three semiconductor chips; an insulating layer covering portions of first semiconductor chips; a mold layer covering portions of a second semiconductor chip; a redistribution line pattern in the insulating layer; and/or an external terminal on the insulating layer. The first semiconductor chips may be stacked relative to the second semiconductor chip.

Methods of fabricating fan-out wafer level packages and packages formed by the methods

Provided is a semiconductor device. The semiconductor device may include a first semiconductor chip that includes a first through silicon via having a first protrusion height and a second through silicon via having a second protrusion height greater than the first protrusion height which are penetrating at least a portion of the first semiconductor chip, a second semiconductor chip may be electrically connected to the first through silicon via, and a third semiconductor chip may be electrically connected to the second through silicon via.

Semiconductor device for semiconductor package having through silicon vias of different heights

A semiconductor device includes a first semiconductor chip, a first connection structure disposed on a first side of the first semiconductor chip, a second semiconductor chip disposed on a second side of the first semiconductor chip, and a second connection structure disposed between the first and second semiconductor chips, wherein a number of the second connection structures is less than a number of the first connection structures.

Growing community of inventors

Suwon-si, South Korea

Hogeon Song