Microsoft Technology Licensing, LLC

Ho-Yuen Chau

Yimin Deng

Kenneth Bryant Pierce

Andrew James Edwards

Scott Chao-Chueh Lee

Darek Josip Mihocka

Saurabh Mohan Kulkarni

Melur K Raghuraman

Bryan William Tuttle

Liang Yang

Lei Kou

Ronald C Murray

Wen-Ke Chen

Sanjay Bhansali

Carlos Jose Cela

Chin Hwan Park

Stuart D De Jong

The disclosed technologies include functionality for managing Multiple Physical Function NVMe Devices ('MFNDs') and the physical functions ('PFs') provided by MFNDs. For example, host devices can discover MFNDs, query the capabilities of MFNDs, and change the operating mode of an MFND between a user mode and a super administrator mode. Hosts can also utilize the disclosed technologies to create and delete individual child PFs on MFNDs. The disclosed technologies also include functionality for managing the settings associated with individual PFs of MFNDs. For example, hosts can query and modify the settings associated with individual child PFs of an MFND. The disclosed technologies also include functionality for managing the QoS provided by individual PFs of a MFND. For example, hosts can also query and modify the QoS provided by individual child PFs of an MFND.

Management of multiple physical function nonvolatile memory devices

A bare metal resource includes a trusted portion and an untrusted portion. The trusted portion includes trusted hardware, an image repository, and a clearance manager. The clearance manager is executable during bootup of the bare metal resource to perform a clearance process on the untrusted portion, including deleting the BIOS in the untrusted portion and loading a trusted BIOS from the image repository on the untrusted hardware, to place the untrusted portion in a trusted state. The bare metal resource may be provisioned to a tenant of a cloud provider after being placed in the trusted state.

Clearance of bare metal resource to trusted state usable in cloud computing

Program execution can be monitored and recorded for later playback. Certain state changes that can be predicted via a virtual processor during playback need not be recorded, so a compressed recording can be stored. To facilitate random access with respect to time during playback, key frames can be stored within the compressed recording. An index mechanism can associate key frames with particular memory addresses. Additionally, a snapshot of values for memory addresses can be used to further facilitate determining the value of a memory address without having to simulate execution. Multiprocessor executions can be supported, and playback can be done on a machine type different from that on which recording took place.

Compressed program recording

Tools and methods are described herein for discovering race condition errors in a software program. The errors are discovered by deliberately causing a processor executing the test program to switch threads at intervals other than normally scheduled by an operating system. The thread switching is caused upon occurrence of selected events. The intervals may be selected automatically or with user input. Furthermore, thread switching may be caused during conditions more likely to cause race condition errors. For example, thread switches may be caused between threads that share control of a memory device or while the processor is executing instructions related to synchronization tools (e.g. locks, mutex, etc.).

Tools and methods for discovering race condition errors

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Redmond, WA, United States of America

Ho-Yuen Chau