Samsung Electronics Co., Ltd.

Samsung Display Co., Ltd.

Postech Academy-Industry Foundation

K. C. Tech Co., Ltd.

Ho-young Kim

Bo-un Yoon

Bo-Kyeong Kang

Se-jung Park

Chang-ki Hong

Si-Young Choi

Myeong-Cheol Kim

Cheol Kyu Kim

Byoung-ho Kwon

Yong-Joon Choi

Ja-Eung Koo

Jae-Kwang Choi

Hee-Don Jeong

Geum-jung Seong

Il-Young Yoon

Hyung-ku Kang

Ji-Eun Han

Suk-Hoon Jeong

Jong-Won Lee

Joon-Sang Park

Jae-seok Kim

Chang-Sun Hwang

Hyeonyong Jang

Dongkwon Kim

Jun-Hwan Yim

Yeon-Tack Ryu

Seung-Jae Lee

Sang-Hyun Park

Ki-Hun Jeong

Sung-Jun Kim

Hyeon-Yong Jang

Young-keun Lee

Byungchoon Yang

Jung Suk Bang

Daecheol Kim

Jae-Yoon Sim

Woo-jin Jung

Hak-Mo Choi

Woo-Young Lee

Ju-hyun Kim

Woongkwon Kim

Joonghyun Kim

Jong-Jae Lee

Jinsung Choi

Seong-Kyu Yun

Namheon Kim

Jin-Hyuk Yoo

Dong-kwon Kim

HeeJoon Kim

Jae-hak Lee

Young-sang Kim

Jin-Myung Hwang

Myoung-Hwan Oh

Hyungguel Kim

Yoon-jae Kim

Dong-bee Jang

Joo-Cheol Han

No-Ul Kim

Jong-Hyung Park

Leian Bartolome

Hyoung-Bin Moon

Doo-sik Moon

Heetae Kim

Yeong-Bong Park

Inhan Jeon

Il-Su Park

Youn-Su Ha

Taeseok Jang

A slurry composition for chemical mechanical polishing, the slurry composition including ceramic polishing particles; a dispersion agent; a pH control agent and an additive having affinity with silicon nitride.

Slurry composition for chemical mechanical polishing

A semiconductor device includes a first fin-type pattern on a substrate, having a first sidewall and a second sidewall opposed to each other; a first trench formed in contact with the first sidewall; a second trench formed in contact with the second sidewall; a first field insulating layer partially filling the first trench; and a second field insulating layer partially filling the second trench and a second field insulating layer partially filling the second trench. The second field insulating layer includes a first region and a second region disposed in a sequential order starting from the second sidewall, an upper surface of the second region being higher than an upper surface of the first field insulating layer. The device further includes a gate electrode on the first fin-type pattern, the first field insulating layer and the second field insulating layer, the gate electrode intersecting the first fin-type pattern and overlapping the second region.

Semiconductor device and method for fabricating the same

A method for fabricating a semiconductor device may comprise forming a first transistor having a first threshold voltage in a first region of a substrate, forming a second transistor having a second threshold voltage less than the first threshold voltage in a second region of the substrate, forming a third interlayer insulating film in the third region, and planarizing the first transistor, the second transistor and the third interlayer insulating film. The first transistor may include a first gate electrode having a first height and a first interlayer insulating film having the first height, and the second transistor may include a second gate electrode having a second height shorter than the first height and a second interlayer insulating film having the second height. The third interlayer insulating film may have the first height.

Methods for fabricating semiconductor device

A semiconductor device includes a fin active region protruding from a substrate and extending in a first direction, a gate electrode covering an upper surface and sidewalls of the fin active region and extending in a second direction crossing the first direction, a gate spacer structure on opposite sidewalls of the gate electrode, an insulating capping layer on the gate electrode and extending in the second direction, an insulating liner on opposite sidewalls of the gate electrode and on an upper surface of the gate spacer structure, and a self-aligned contact at a side of the gate electrode. The insulating liner may have a second thickness greater than a first thickness of the gate spacer structure. A sidewall of the self-aligned contact may be in contact with the gate spacer structure and the insulating liner.

Semiconductor devices utilizing capping layers with multiple widths and methods of manufacturing the same

Disclosed is a method of manufacturing semiconductor devices. A gate trench and an insulation pattern defined by the gate trench are formed on a substrate and the protection pattern is formed on the insulation pattern. A gate dielectric layer, a work function metal layer and a sacrificial layer are sequentially formed the substrate along a surface profile of the gate trench. A sacrificial pattern is formed by a CMP while not exposing the insulation pattern. A residual sacrificial pattern is formed at a lower portion of the gate trench and the gate dielectric layer and the work function metal layer is etched into a gate dielectric pattern and a work function metal pattern using the residual sacrificial pattern as an etch stop layer.

Method of manufacturing semiconductor devices

A method of manufacturing a semiconductor device according to one or more exemplary embodiments of the present inventive concept includes forming a plurality of dummy gates on a substrate. Each of the dummy gates includes a gate mask disposed on an upper surface of each of the dummy gates. A spacer is disposed on at least two sides of the dummy gates. An insulating interlayer is formed on the gate mask and the spacer. A first polishing including chemical mechanical polishing is performed on portions of the gate mask and the insulating interlayer by using a slurry composite having a first mixing ratio. A second polishing including chemical mechanical polishing is formed on remaining portions of the gate mask and the insulating interlayer to expose upper surfaces of the plurality of dummy gates, by using a slurry composite having a second mixing ratio.

Method of manufacturing semiconductor device

Semiconductor devices may include a semiconductor substrate with a first semiconductor fin aligned end-to-end with a second semiconductor with a recess between facing ends of the first and second semiconductor fins. A first insulator pattern is formed adjacent sidewalls of the first and second semiconductor fins and a second insulator pattern is formed within the first recess. The second insulator pattern may have a top surface higher than a top surface of the first insulator pattern, such as to the height of the top surface of the fins (or higher or lower). First and second gates extend along sidewalls and a top surface of the first semiconductor fin. A dummy gate electrode may be formed on the top surface of the second insulator. Methods for manufacture of the same and modifications are also disclosed.

Semiconductor devices and methods of fabricating semiconductor devices are provided. The methods may include forming an interlayer insulation layer on a substrate. The interlayer insulation layer may surround a dummy silicon gate and may expose a top surface of the dummy silicon gate. The methods may also include recessing a portion of the interlayer insulation layer such that a portion of the dummy silicon gate protrudes above a top surface of the recessed interlayer insulation layer and forming an etch stop layer on the recessed interlayer insulation layer. A top surface of the etch stop layer may be coplanarly positioned with the top surface of the dummy silicon gate. The methods may further include forming a trench exposing the substrate by removing the dummy silicon gate using the etch stop layer as a mask.

Methods of fabricating semiconductor devices

A display apparatus includes a display panel, a backlight unit, a backlight control circuit, sensors, a read-out circuit and a sensor auxiliary circuit. The display panel includes pixels and displays an image. The backlight unit includes a first light source which emits a first light in a infrared light range. The backlight control circuit controls a brightness of the first light source. The sensors sense an external signal and outputs first sensing signals. The read-out circuit outputs the first sensing signals as second sensing signals. The sensor auxiliary circuit compares a maximum value and a minimum value of the second sensing signals and provides a brightness control signal to the backlight control circuit based on the compared difference to control the brightness of the first light source.

Display apparatus and method of driving the same

In a display apparatus, a first substrate includes a plurality of pixels and a plurality of first signal lines connected to the pixels. A second substrate includes a plurality of sensors and a plurality of second signal lines connected to the sensors and extended in a direction in which the first signal lines are extended. Each of the second signal lines is disposed between two first signal lines adjacent to each other and disposed closer to a center line, which divides an area between the two first signal lines into two portions, than the two first signal lines. Thus, signal interference between the first and second signal lines may be reduced, thereby preventing mis-operation or malfunction of the display apparatus.

Display apparatus with reduced signal interference

A method for fabricating a semiconductor device includes forming a pre-isolation layer covering a fin formed on a substrate, the pre-isolation layer including a lower pre-isolation layer making contact with the fin and an upper pre-isolation layer not making contact with the fin, removing a portion of the upper pre-isolation layer by performing a first polishing process, and planarizing the pre-isolation layer such that an upper surface of the fin and an upper surface of the pre-isolation layer are coplanar by performing a second polishing process for removing the remaining portion of the upper pre-isolation layer.

Method for fabricating a semiconductor device

A display device capable of accurately sensing object presence at lower power consumption is presented, as well as a method of driving the display device. The display device includes a sensing circuit that detects the presence of an object by sensing radiation, and a radiation source array that provides radiation to the sensing circuit. First signals are provided to the scan lines of the sensing circuit, sequentially activating the sensors during a frame period. Second signals are provided to a radiation source array to selectively activate different portions of the radiation source array. The first and second signals are synchronized in their timing such that the portion of the radiation source array that supplies radiation to the activated sensors are turned on.

Energy-efficient display apparatus with object-sensing capability

An impulsively driven liquid crystal display includes a display panel displaying an image in response to a gate signal and a data signal, a panel driving circuit providing the gate signal and the data signal to the display panel using an image signal and a control signal, a backlight unit including a plurality of light sources that blink at once to provide a light to the display panel, and a backlight control circuit. The backlight control circuit automatically detects an existence of text information from a received image signal, and if the text is detected to be present, adjusts the blinking timing of the light sources to correspond with the area on the display panel where the text will be displayed, the adjustment being a function of a liquid crystal response delay time of liquid crystals used in the display panel.

Liquid crystal display and method of driving the same

Growing community of inventors

Seongnam-si, South Korea

Ho-young Kim