Samsung Electronics Co., Ltd.

Ho Yeon Jeon

Jae Gon Lee

Ah Chan Kim

Woo Sung Lee

Sang Woo Han

Taek Kyun Shin

Hwa Yeal Yu

Myung Kyoon Yim

Seung Hyun Choi

Eun Suk Kim

Seung Gyu Lee

A semiconductor device includes a first control circuit controlling a first child clock source to receive a clock signal from a parent clock source, a first channel management (CM) circuit transmitting a first clock request to the first control circuit in response to a second clock request received from a first IP block, a second control circuit controlling a second child clock source to receive the clock signal from the parent clock source, a second CM circuit transmitting a third clock request to the second control circuit in response to a fourth clock request received from a second IP block, and a power management unit transmitting a power control command to the first CM circuit and the second CM circuit to control a power state of the first IP block and the second IP block. The first CM circuit and the second exchange signals to maintain a master-slave relationship.

Semiconductor device, semiconductor system and method for operating semiconductor device

A semiconductor device and a semiconductor system are provided. A semiconductor device includes a monitoring circuit receiving a first operating voltage and a second operating voltage, which is different from the first operating voltage, from a Power Management Integrated Circuit (PMIC) and monitoring a duration of use of a System-on-Chip (SoC) at each of the first and second operating voltages; a processing circuit calculating a normalized value based on predetermined weight information from the duration of use of the SoC at each of the first and second operating voltages; and a voltage circuit determining whether to increase an operating voltage of the SoC by comparing the normalized value with a predetermined value.

Semiconductor device and semiconductor system

A semiconductor device includes an inductor selectively connected to a power supply voltage and configured to store and release energy; a first transistor connected between the power supply voltage and the inductor and configured to provide the power supply voltage to the inductor; a second transistor connected to the first transistor in series, connected between the inductor and a ground voltage, and configured to provide the ground voltage to the inductor; a modulator configured to provide a modulation signal to a control circuit configured to control the first and second transistors by performing pulse width modulation (PWM); a current sensor configured to sense an amount of current passing through the first transistor and generate a first output signal based on the sensed amount of current; and a first overcurrent protection output generator configured to generate a second output signal based on the first output signal and a first reference signal.

Semiconductor device and system

A semiconductor device includes a first intellectual property block (IP block) which includes a function unit and an interface unit; a first clock control circuit which controls a first clock source; a second clock control circuit which transmits a first clock request to the first clock control circuit, and controls a second clock source which receives a clock signal from the first clock source; and a channel management circuit configured to transmit a second clock request to the second clock control circuit in response to a clock stop request received from the first IP block; wherein the function unit controls an operation of the first IP block, and the interface unit receives a first signal provided from a second IP block electrically connected to the first IP block and provides the first signal to the function unit.

Semiconductor device including a clock source for generating a clock signal and a clock control circuit for controlling the clock source in hardware, a semiconductor system including the semiconductor device, and a method of operating the semiconductor device

Methods of operating a system on chip including a first power domain and a second power domain are provided. The method includes measuring at least one of a voltage and a current, which are applied to the first power domain in analog mode to obtain a measurement result; calculating a first power consumed in the first power domain based on the measurement result; calculating a second power consumed in the second power domain in digital mode based on an activity of the second power domain; and controlling a total power of the system on chip based on the first power and the second power. At least one of the measuring, calculating a first power, calculating a second power and controlling are performed by at least one processor.

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Hwaseong-si, South Korea

Ho Yeon Jeon