Freescale Semiconductor,inc.

Ho Wang Wong

Hei Ming Shiu

Wai Keung Ho

Fei Ying Wong

Kam Fai Lee

A lead frame () for a semiconductor device includes a first row of terminals () surrounding a die receiving area () and a second row of terminals () spaced from and surrounding the first row of terminals (). The first and second rows of terminals () have a first height (H). The terminals () of the first row include a step () that has a greater height (H). Bond wires () connecting die pads () to the first row terminals () extend over the second height Hpart of the terminal () and are attached to the first height Hpart of the terminal (). The step () insures that the bond wires () attached to the stepped terminals () have a high wire kink profile so that they are less susceptible to damage in later process steps.

Multi-row lead frame

A method of packaging an integrated circuit die () includes the steps of providing a foil sheet () and forming a layer of solder () on a first side of the foil sheet. A first side of the integrated circuit die is attached to the solder on the foil sheet. The first side of the die has a layer of metal () on it and a second, opposing side of the die includes bonding pads (). The bonding pads are electrically connected to the solder on the foil sheet with wires (). The die, the electrical connections, and the first side of the foil sheet are encapsulated with a mold compound (). The foil sheet is separated from the die and the wires, which forms a packaged integrated circuit ().

Growing community of inventors

Hong Kong, China

Ho Wang Wong