Lg Electronics Inc.

Samsung Electronics Co., Ltd.

Samsung Electro-mechanics Co., Ltd.

Amkor Technology Singapore Holding Pte. Ltd.

Samsung Display Co., Ltd.

Hyundai Motor Company

Kia Motors Corporation

Lg Innotek Co., Ltd.

University-Industry Cooperation Group of Kyung Hee University

Woongjin Coway Co., Ltd

Hyundai Electronics Ind. Co., Ltd.

Eo Technics Co., Ltd

Industrial Bank of Korea

Ho Sam Choi

Kwan Ho Yum

In Ho Choi

Jong Ho Lee

Kyung Hwan Kim

Gi Seop Lee

Ho Jung Kim

Jeong Yong Kim

Hooi Joong Kim

Jin Seong Kim

Ki Wook Lee

Dong Joo Park

Jae Dong Kim

Dae Byoung Kang

Hyun Kyung Kim

Deok Huh

Ju Youn Lee

Jin Woo Kim

Tae Hyung Kim

Sung-Jin Kim

Yong-Jun Kwak

Ki Pyo Hong

Jin Sung Kim

Eun Jung Lee

Hyun-Woo Lee

Sim Chung Kang

Baik Young Chung

June Kyu Park

Won Tae Kim

Jin Kyu Kim

Sang Young Park

Il Sung Bae

Kwang Ho Kim

Keun Hyoung Choi

Sung Hwan Cho

Jung Jin Park

Yeon Soo Jung

Hyo Sung Choi

Kyu Jeong Sim

Jae Won Kim

So Hyeon Hong

Seung Min Kang

Youn Ho Yoo

Chung Eun Lee

Jong Suk Jeong

Hee Sang Park

Eungryeol Seo

Moo Hyung Lee

Sung Jong Kim

Sung Jin Cho

Kyung-hwa Lim

Jong Hoon Yoo

Byung Sung Kim

Jae Seuk Park

Jung Hwan Yun

Hooijoong Kim

Jea-Gun Park

In Wook Oh

Sung Keun Park

Chun Hee Seo

Chang Soo Han

Sun Mi Kim

Min Hoe Kim

Dong Whan Choi

Nam Sik Yim

Myoung Hun Kim

Jin-Hyung Park

Jae-Hyung Lim

Hong Taek Lim

Sungwoo Lee

Hak Yong Lee

Jaeik Park

Ii Sung Bae

Jong-Young Cho

Hee-Sub Hwang

In Hye Ham

Gab Sik Yang

Nack Hoon Kim

Chan Sung Bang

Hooi-joong Kim

Jae-ik Park

Won-jun Jang

Dong Hwan Choi

Ju-Yeon Lee

Jingwan Jang

Kim Ki Hyun Hyun

A semiconductor device includes a substrate with a conductive pattern. A semiconductor die is electrically connected to the substrate and both the semiconductor die and the substrate are at least partially covered by a package body. In some examples, through-mold vias are formed in the package body to provide electrical signal paths from an exterior surface thereof to the conductive pattern of the substrate. In some examples, through-mold vias are included in the package body to provide electrical signal paths between the semiconductor die and an exterior surface of the package body. In some examples, an interposer is electrically connected to the through-mold vias and may be covered by the package body and/or disposed in spaced relation thereto. In some examples, the interposer may not be electrically connected to the through-mold vias but may have one or more semiconductor dies of the semiconductor device electrically connected thereto.

Semiconductor device with through-mold via

A multilayer electronic component includes a body including a capacitance formation portion including a dielectric layer and an internal electrode alternately disposed in a first direction, and a cover portion disposed on both end surfaces of the capacitance formation portion opposing each other in the first direction, and an external electrode disposed on the outside of the body and connected to the internal electrode. The cover portion has a first region, adjacent to the capacitance formation portion, and a second region, adjacent to the outside of the cover portion. A content of fluorine (F) included in the second region is greater than a content of fluorine (F) included in the first region.

Multilayer electronic component

A multilayer electronic component includes a body including a dielectric layer and internal electrodes alternately disposed with the dielectric layer in a first direction, and a cover portion disposed on end surfaces of the capacitance forming portion; and an external electrode disposed on the body, wherein a ratio of an average content of zirconium (Zr) included in the capacitance forming portion to an average content of zirconium (Zr) included in the cover portion satisfies 0.55 or more and 1.00 or less, wherein an average content of zirconium (Zr) included in the capacitance forming portion satisfies 1073 ppm or more and 1950 ppm or less, and wherein an average size of the dielectric grains included in a central region of the capacitance forming portion is 200 nm or more and 300 nm or less, and a standard deviation for a size is 100 nm or more and 130 nm or less.

A multilayer electronic component includes a body including a capacitance formation portion including a dielectric layer and an internal electrode, alternately disposed in a first direction, and a cover portion disposed on both end surfaces of the capacitance formation portion opposing each other in the first direction; and an external electrode disposed outside the body and connected to the internal electrode, wherein the cover portion contains fluorine (F), and A1 and A2 satisfy A2>A1, where A1 is an average size of a dielectric grain included in the cover portion, and A2 is an average size of a dielectric grain included in the dielectric layer.

A multilayer capacitor includes a body including a plurality of dielectric layers and a plurality of internal electrodes stacked in a first direction, and external electrodes, wherein the body includes an active portion, a side margin portion covering at least one of a first surface and a second surface of the active portion opposing each other in a second direction, and a cover portion covering the active portion in the first direction, respective dielectric layers among the plurality of dielectric layers include a barium titanate-based composition, the dielectric layer of the side margin portion includes Sn, and a content of Sn in the dielectric layer of the side margin portion is different from that of Sn in the dielectric layer of the active portion, and the dielectric layer of the side margin portion includes at least some grains having a core-shell structure.

Multilayer capacitor with core-shell dielectric

In accordance with the present description, there is provided multiple embodiments of a semiconductor device. In each embodiment, the semiconductor device comprises a substrate having a conductive pattern formed thereon. In addition to the substrate, each embodiment of the semiconductor device includes at least one semiconductor die which is electrically connected to the substrate, both the semiconductor die and the substrate being at least partially covered by a package body of the semiconductor device. In certain embodiments of the semiconductor device, through-mold vias are formed in the package body to provide electrical signal paths from an exterior surface thereof to the conductive pattern of the substrate. In other embodiments, through mold vias are also included in the package body to provide electrical signal paths between the semiconductor die and an exterior surface of the package body. Other embodiments of the semiconductor device comprise one or more interposers which are electrically connected to the through-mold vias, and may be covered by the package body and/or disposed in spaced relation thereto. In yet other embodiments of the semiconductor device, the interposer may not be electrically connected to the through mold vias, but may have one or more semiconductor dies of the semiconductor device electrically connected thereto.

A display device includes a first substrate, a second substrate facing the first substrate, and a sealing layer respectively including first, second and third side surfaces coplanar with each other; a first recess defined recessed from each of the first side surface, the second side surface and the third side surface; a first conductive pattern in the first recess; and a first driver facing each of the first side surface, the second side surface and the third side surface. At the first recess: the first conductive pattern is exposed to outside the first substrate, the second substrate and the sealing layer, and the first driver is electrically connected to the first conductive pattern.

Display device and manufacturing method thereof

A compressor including a shaft, a flange to support shaft, and a muffler to reduce noise generated in a compression chamber of the compressor. The flange including a plurality of noise reductions units each of which is formed to have a different volume and at least a portion of the noise reduction unit is covered by the muffler.

Compressor

A multilayer electronic component includes a body including dielectric layers and internal electrodes. The internal electrodes are exposed to fifth and sixth surfaces of the body, and first ends thereof are respectively exposed to third or fourth surfaces of the body. First and second side margin portions are respectively disposed on the fifth and sixth surfaces. The body includes an active portion, and upper and lower cover portions disposed respectively on a first surface and a second surface of the active portion in a first direction. The ratio of a dimension of the lower cover portion in the first direction C to a dimension of the first side margin portion in the third direction A, C/A&#x2265;2.6, C/T is 0.080, where T is a dimension of the body in the first direction, and D&#x3c;C where D is the dimension of the body in the first direction.

A multilayer ceramic electronic component includes: a ceramic body including an active portion having dielectric layers and first and second internal electrodes and first and second cover portions disposed on opposite surfaces of the active portion in a stacking direction, respectively; wherein when a region of the cover portion in contact with the first or second internal electrode is an inner region of the cover portion and a region of the active portion in contact with the inner region of the cover portion is an outer region of the active portion, 1.00&#x3c;X/X&#x2264;1.04 in which X/Xis a ratio of a molar ratio (X) of barium (Ba) to titanium (Ti) in the inner region of the cover portion to a molar ratio (X) of barium (Ba) to titanium (Ti) in the outer region of the active portion.

Multilayer ceramic electronic component

A front-loading laundry-washing apparatus includes: a housing including a door in a front thereof for opening and closing; a washing tub rotatably supported inside the housing and shaped like a cylinder opened toward the door to load laundry therein; and a plurality of lifters arranged at predetermined intervals along a spinning direction of the washing tub on an inner circumferential surface of the washing tub, and including end portions extended toward a spinning center of the washing tub, wherein at least one lifter of the plurality of lifters is provided to alternate between a first state having a first height from the inner circumferential surface in a first section within a spinning section of the washing tub and a second state having a second height higher than the first height from the inner circumferential surface in a second section within the spinning section of the washing tub.

Front-loading laundry-washing apparatus

A centrifugal fan assembly comprises a blade assembly integrally formed. The blade assembly comprises a plurality of blades integrally formed, wherein each blade of the plurality of blades has a twisted shape with a first portion of a hub end of the each blade facing a first adjacent blade, and a second portion of a outer end of the each blade diagonal to the first portion of the hub end facing a second adjacent blade, a fixing portion integrally connected to the blades. The centrifugal fan assembly comprises at least one opening formed in the fixing portion and a hub plate comprising a recessed portion and a convex portion enabled to couple to the blade assembly. The concave portion is provided to correspond to a shape of the fixing portion and the convex portion is provided to correspond to a shape of the at least one opening.

Centrifugal fan assembly

Provided is an automatic inspection device and method for inspecting processing quality of laser processing equipment that forms a modified area by irradiating a laser beam into an object to be processed. The automatic inspection device includes: an image film coated on a bottom surface of the object to be processed; an image sensing unit configured to detect a damage image of the object to be processed formed on the image film through irradiation of the laser beam; and an image processing unit configured to process the damage image detected by the image sensing unit.

Automatic inspection device and method of laser processing equipment

A method of generating a layout and manufacturing a semiconductor device, including receiving a design layout of a semiconductor device including active fins; extracting a design rule of the active fins from the design layout; forming fin lines overlapping the active fins such that the fin lines have a length that is greater than a length of the active fins, wherein the fin lines continuously extend from a position adjacent to one edge of a layout region of the semiconductor device toward another edge, and are formed in an entirety of the layout region of the semiconductor device; forming a mandrel pattern layout in an entirety of the layout region of the semiconductor device, using the fin lines; and forming a cut pattern layout in the entirety of the layout region of the semiconductor device, using the active fins.

Method of generating layout and method of manufacturing semiconductor devices using same

Growing community of inventors

Suwon-si, South Korea

Ho Sam Choi