Hynix Semiconductor Inc.

Skhynix Inc.

Ho Jin Cho

Cheol Hwan Park

Dong Kyun Lee

Jae Soo Kim

Eun Ah Lee

Hyun Jung Kim

Seung Woo Jin

Bong Soo Kim

Dong Su Park

Tae Hyeok Lee

Su Jin Chae

Jong Kuk Kim

Jun Soo Chang

Young Dae Kim

Gyu Dong Cho

Jae Wook Seo

A semiconductor device that prevents the leaning of storage node when forming a capacitor having high capacitance includes a plurality of cylinder-shaped storage nodes formed over a semiconductor substrate; and support patterns formed to fix the storage nodes in the form of an 'L' or a '+' when viewed from the top. This semiconductor device having support patterns in the form of an &#x2018;L&#x2019; or a &#x2018;+&#x2019; reduces stress on the storage nodes when subsequently forming a dielectric layer and plate nodes that prevents the capacitors from leaking.

Semiconductor device and method for manufacturing the same,which prevents leaning of a storage node when forming a capacitor having a plurality of storage nodes of 'L' or '+' shape support patterns

An embodiment of the invention includes a pillar type capacitor where a pillar is formed over an upper portion of a storage node contact. A bottom electrode is formed over sidewalls of the pillar, and a dielectric film is formed over pillar and the bottom electrode. A top electrode is then formed over the upper portion of the dielectric film.

Method for forming pillar type capacitor of semiconductor device

A semiconductor device having a high aspect cylindrical capacitor and a method for fabricating the same is presented. The high aspect cylindrical type capacitor is a stable structure which is not prone to causing bunker defects and losses in a guard ring. The semiconductor device includes the cylindrical type capacitor structure, a storage node oxide, a guard ring hole, a conducive layer, and a capping oxide. The cylindrical type capacitor structure in a cell region includes a cylindrical type lower electrode, a dielectric and an upper electrode. The storage node oxide is in a peripheral region over the semiconductor substrate. The conductive layer coating the guard ring hole. The guard ring hole at a boundary of the peripheral region that adjoins the cell region over the semiconductor substrate. The capping oxide partially fills in a part of the conductive layer. The gapfill film filling in the rest of the conductive layer.

Semiconductor device having a high aspect cylindrical capacitor and method for fabricating the same

A semiconductor device having a high aspect cylindrical capacitor and a method for fabricating the same is presented. The high aspect cylindrical type capacitor is a stable structure which is not prone to causing bunker defects and losses in a guard ring. The semiconductor device includes the cylindrical type capacitor structure, a storage node oxide, a guard ring hole, a conductive layer, and a capping oxide. The cylindrical type capacitor structure in a cell region includes a cylindrical type lower electrode, a dielectric and an upper electrode. The storage node oxide is in a peripheral region over the semiconductor substrate. The conductive layer coating the guard ring hole. The guard ring hole at a boundary of the peripheral region that adjoins the cell region over the semiconductor substrate. The capping oxide partially fills in a part of the conductive layer. The gapfill film filling in the rest of the conductive layer.

A laser annealing method for manufacturing a semiconductor device is presented. The method includes at least two forming steps and one annealing step. The first forming steps includes forming gates on a semiconductor substrate. The second forming step includes forming an insulation layer on the semiconductor substrate and on the gates. The annealing step includes annealing the insulation layer using electromagnetic radiation emitted from a laser.

Laser annealing method for manufacturing semiconductor device

A method for manufacturing a semiconductor device for use in avoiding unwanted oxidation along exposed surfaces and for use in relieving etching damage is presented. The method includes step of forming sequentially a gate insulation layer, a polysilicon layer, a barrier layer, a metallic layer and a hard mask layer over a semiconductor substrate. The method also includes a step of etching the hard mask layer, the metallic layer, the barrier layer, the polysilicon layer and the gate insulation layer to form a gate. The method also includes a nitrifying step which uses a free radical is assisted chemical vapor deposition (RACVD) nitrifying process on surfaces of the layers forming the gate and a surface of the semiconductor substrate. The method also includes a step of subsequently performing a reoxidation process to the semiconductor substrate resultant that the RACVD nitrifying process is performed.

Method for manufacturing semiconductor device using a free radical assisted chemical vapor deposition nitrifying process

A capacitor is made by forming a buffer oxide layer, an etching stop layer, and a mold insulation layer over a semiconductor substrate having a storage node contact plug. The mold insulation layer and the etching stop layer are etched to form a hole in an upper portion of the storage node contact plug. A tapering layer is deposited over the mold insulation layer including the hole. The tapering layer and the buffer oxide layer are etched back so that the tapering layer is remained only at the upper end portion of the etched hole. A metal storage node layer formed on the etched hole over the remaining tapering layer. The mold insulation layer and the remaining tapering layer are removed to form a cylindrical storage node having a tapered upper end. A dielectric layer and a plate node are formed over the storage node.

Capacitor having tapered cylindrical storage node and method for manufacturing the same

Forming a capacitor of a semiconductor device includes forming an interlayer dielectric having holes over a semiconductor substrate. A conductive layer is then formed on surfaces of the holes and on the upper surface of the interlayer dielectric. A silicon-containing conductive layer is formed by flowing a silicon source gas for the semiconductor substrate formed with the conductive layer, so that silicon atoms can penetrate into the conductive layer. The silicon-containing conductive layer prevents etchant from infiltrating the interlayer dielectric below the silicon-containing conductive layer.

Method for forming capacitor of semiconductor device

A method for manufacturing a capacitor of a semiconductor element including: forming a bottom electrode of the capacitor on a semiconductor substrate; performing rapid thermal nitrification (RTN) on the upper surface of the bottom electrode; performing a thermal process on the obtained structure having the bottom electrode in a furnace under a nitride atmosphere to eliminate stress generated by the RTN; forming AlOand HfOdielectric films on the nitrified bottom electrode; and forming a plate electrode of the capacitor on the AlOand HfOdielectric films. The thermal process is performed after the RTN performed on the surface of the bottom electrode, so that stress, generated from the RTN, is alleviated, thereby allowing the capacitor to obtain a high capacitance and lowering leakage current.

Method for manufacturing capacitor of semiconductor element

The present invention relates to a method for fabricating a semiconductor device. The method comprises the steps of: forming a gate line on a semiconductor substrate; forming a buffer layer and a spacer nitride film on the entire surface of the substrate including the gate line; selectively etching the buffer layer and the spacer nitride film in such a manner that they remain on both sides of the gate line; performing an ion implantation process using the remaining buffer layer and spacer nitride film as a barrier film to form junction regions in the semiconductor substrate at both sides of the gate line; forming an interlayer insulating film on the entire upper portion of the resulting substrate; selectively removing the interlayer insulating film to form contact holes exposing the upper surface of the junction regions; and forming contact plugs in the contact holes.

Method for fabricating semiconductor device

A method for forming an isolation layer of a semiconductor device, which comprises the steps of: a) sequentially forming a pad oxide layer and a pad nitride layer on a silicon substrate; b) etching the pad nitride layer, the pad oxide layer, and the silicon substrate, thereby forming a trench; c) thermal-oxidizing the resultant substrate to form a sidewall oxide layer on a surface of the trench; d) nitrifying the sidewall oxide layer through the use of NHannealing; e) depositing a liner aluminum nitride layer on an entire surface of the silicon substrate inclusive of the nitrated sidewall oxide layer; f) depositing a buried oxide layer on the liner aluminum nitride layer to fill the trench; g) performing a chemical mechanical polishing process with respect to the buried oxide layer; and h) eliminating the pad nitride layer.

Method for forming isolation layer of semiconductor device

A method for forming a polyatomic layer with a mixed deposition method consisting of an atomic layer deposition method (ALD) and a chemical vapor deposition method. The mixed deposition method can be adopted to form a polyatomic high dielectric layer, such as BST or STO. Accordingly, it is possible to form a polyatomic high dielectric layer having a uniform composition distribution, and thereby also having a high dielectric characteristic and a low leakage current characteristic.

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Gyeonggi-do, South Korea

Ho Jin Cho