Hitachi, Ltd.

Hitachi Vlsi Engineering Corp.

Hitachi Process Computer Engineering, Inc.

Hitoshi Kawaguchi

Koichi Kimura

Kazushi Kobayashi

Tetsuya Mochida

Koichi Okazawa

Ichiharu Aburano

Hideki Kamimaki

Tsuyoshi Nakagawa

Hideaki Gemma

Yukihide Inagaki

Takayuki Tamura

Osamu Nagashima

Katsuyuki Sato

Hiroaki Aotsu

Yasunori Yamaguchi

Yasuo Kurosu

Makoto Morino

Kouichi Kimura

Yosuke Yukawa

Hiroshi Wada

Shigeo Tsujioka

Masahiro Yoshida

Masami Yamagishi

Mitsutoshi Uchida

Masami Jikihara

Kazumi Kubota

Tetsuya Saeki

Kensuke Ooyu

Jun Mitake

Terutaka Okada

Kouichi Okazawa

Takanori Ishikawa

A processor bus linked with at least a processor, a memory bus linked with a main memory, and a system bus linked with at least an input/output device are connected to a three-way connection control system. The control system includes a bus-memory connection controller connected to address buses and control buses respectively of the processor, memory, and system buses to transfer address and control signals therebetween. The control system further includes a data path switch connected to data buses respectively of the processor, memory, and system buses to transfer data via the data buses therebetween depending on the data path control signal.

Bus system for use with information processing apparatus

A labor of disconnecting many cables is omitted even when carrying a file basestation with an external storage loaded together with a main body. An information processing unit comprises: a main body having a CPU, a keyboard and a display unit; a file basestation with an external storage, such as an FD&#x2022;D or a CD ROM&#x2022;D, loaded; and a portreplicator with many connectors loaded. Removal of the main body alone from the portreplicator can omit the labor of disconnecting many cables connected to the portreplicator.

Information processing unit and information processing related units

A labor of disconnecting many cables is omitted even when carrying a file basestation with an external storage loaded together with a main body. An information processing unit comprises: a main body having a CPU, a keyboard and a display unit; a file basestation with an external storage, such as an FD&#x2022;D or a CD-ROM&#x2022;D, loaded; and a portreplicator with many connectors loaded. Removal of the main body alone from the portreplicator or removal of the main body and the file basestation can omit the labor of disconnecting many cables connected to the portreplicator.

A labor of disconnecting many cables is omitted even when carrying a file basestation with an external storage loaded together with a main body. An information processing unit comprises: a main body having a CPU, a keyboard and a display unit; a file basestation with an external storage, such as an FD&middot;D or a CD-ROM&middot;D, loaded; and a portreplicator with many connectors loaded. Removal of the main body alone from the portreplicator or removal of the main body and the file basestation can omit the labor of disconnecting many cables connected to the portreplicator.

An information processing apparatus is provided which is capable of carrying out the higher memory access. The information processing apparatus includes a memory unit of a synchronous DRAM device which serves to output data synchronously with the supplied clock signal, and a control unit for controlling the access to the memory unit in accordance with an instruction issued from a CPU. The clock signal which is to be supplied to the memory unit is outputted from the control unit. The clock signal which has been outputted from the control unit is supplied to the memory unit and also is pulled back to the control unit. The control unit fetches therein the data, which has been outputted from the storage unit, at the timing which is determined on the basis of the pulled back clock signal. As a result, the control unit reduces the difference between a delay of the data which is outputted from the control unit and a delay of the clock signal which is used to determine the timing at which the data is fetched therein.

Information processing apparatus

Information processing apparatus capable of reading data from memory at high speed

A labor of disconnecting many cables is omitted even when carrying a file basestation with an external storage loaded together with a main body. An information processing unit comprises: a main body having a CPU, a keyboard and a display unit; a file basestation with an external storage, such as an FD&bull;D or a CD-ROM&bull;D, loaded; and a portreplicator with many connectors loaded. Removal of the main body alone from the portreplicator or removal of the main body and the file basestation can omit the labor of disconnecting many cables connected to the portreplicator.

A processor bus linked with at least a processor, a memory bus linked with a main memory, and a system bus linked with at least an input/output device are connected to a three-way connection control system. The control system includes a bus-memory connection controller connected to address buses and controL buses respectively of the processor, memory, and system buses to transfer address and control signals therebetween. The control system further includes a data path switch connected to data buses respectively of the processor, memory, and system buses to transfer data via the data buses therebetween depending on the data path control signal.

Growing community of inventors

Yokohama, Japan

Hitoshi Kawaguchi