Cardiac Pacemakers, Inc.

Hiten J Doshi

Scott R Stubbs

William J Linder

Kenneth Paul Hoyme

Conrad L Sowder

Lynn H Elliott

James O Gilkerson

Vickie L Conley

LeAnne Marie Mackey

Jason W Eberle

Diane Schuster

Joseph M Bocek

Allan Thomas Koshiol

Thomas J Harris

LeAnne M Eberle

Douglas J Gifford

Lynn S Elliott

An implantable medical device (IMD) includes a lead having one or more sensing electrodes and one or more therapy delivery electrodes, and a sensor configured to detect the presence of static and time-varying scan fields in a magnetic resonance imaging (MRI) environment. A controller, in electrical communication with the lead and the sensor, is configured to process signals related to tachycardia events sensed via the one or more sensing electrodes and to deliver pacing and shock therapy signals via the one or more therapy delivery electrodes. The controller compares the sensed static and time-varying scan fields to static and time-varying scan field thresholds. The controller controls delivery of anti-tachycardia pacing and shock therapy signals as a function of the detected tachycardia events, the comparison of the sensed static scan field to the static scan field threshold, and the comparison of the time-varying scan fields to the time-varying scan field thresholds.

Implantable medical device with automatic tachycardia detection and control in MRI environments

An implantable device, such as a pacer, defibrillator, or other cardiac rhythm management device, can include a failsafe backup, such as a separate and independent safety core that can assume control over operation of the implantable device from a primary controller. In an example, the safety core can include a normal first safety core operating mode and a magnetic resonance imaging (MRI) second safety core operating mode that can provide different functionality from the normal first safety core operating mode.

Implantable device failsafe mode for MRI

This document discusses, among other things, an implantable device comprising a communication circuit configured to communicate with an external device, a logic circuit communicatively coupled to the communication circuit, and a processor, communicatively coupled to the logic circuit and the communication circuit. The processor is configured to communicate information with the external device, via the communication circuit and the logic circuit, using a set of communication messages. While in a device safety mode, the processor is held in an inactive state and the logic circuit is configured to communicate with the external device using a subset of the set of communication messages.

Telemetry during safety mode operation

A pacing monitoring system is described for incorporation in an implantable pacemaker that monitors the pacing rate and/or cumulative pace count in order to protect a patient from excessive pacing. The system includes monitoring circuitry that is configured to operate in multiple monitoring zones, where each zone is adapted to prevent excessively high-rate pacing during a particular mode of device operation.

Cardiac pacemaker with pacing rate monitoring

Embodiments herein generally relate to implantable medical devices and, specifically, to a system and method for providing fault tolerant processing in an implantable medical device. In an embodiment a system for providing fault tolerant processing in an implantable medical device is provided. The system can include an implantable medical device comprising a processor and memory store configured to execute a plurality of threads, temporal and spatial constraints assigned to one or more of the threads, and a kernel. The kernel can include a scheduler and a thread monitor configured to monitor execution of threads against the temporal and spatial constraints, and further configured to issue a response upon violation of either of the constraints by one of the plurality of threads. In an embodiment a method for providing fault tolerant processing in an implantable medical device is provided. Other embodiments are also included herein.

System and method for providing fault tolerant processing in an implantable medical device

A system and method is disclosed for system fault recovery by an implantable medical device which employs a global fault response. The system enables the device to consistently recover from transient faults while maintaining a history of the reason for the device fault. Upon detection of a fault, the primary controller of the device signals a reset controller which then issues a reset command. All sub-systems of the primary device controller are then reset together rather than resetting individual sub-systems independently to ensure deterministic behavior.

System and method for recovering from transient faults in an implantable medical device

A system comprises an implantable medical device (IMD). The IMD includes at least one electrical input to receive sensed electrical activity of a heart and a sampler circuit coupled to the at least one electrical input. The sampler circuit generates sampled values of the sensed electrical activity. The IMD includes a clock circuit that generates readable values representative of absolute time. The IMD also includes a controller circuit coupled to the sampler circuit and the clock circuit. The controller circuit processes the sampled values and generate at least one marker to indicate a detected event related to the electrical activity. The controller circuit also stores a timestamp of absolute time of the detected event with the at least one marker in memory.

Synchronizing continuous signals and discrete events for an implantable medical device

A system and method is disclosed by which an implantable cardiac device may deliver tachyarrhythmia therapy in the event of a system fault. A hardware-based safety core provides the logic circuitry for detecting tachyarrhythmias and delivering shock therapy in the event of a fault which disables operation of the device's primary control circuitry. The safety core defibrillator eliminates common mode failure of the primary control circuits used in the primary defibrillator system. Failures in the primary controller memory or execution will activate the safety core defibrillator.

System and method for providing tachyarrhythmia therapy by implantable device in presence of system faults

A system and method is disclosed by which an implantable cardiac device may deliver bradycardia therapy in the event of a system fault. A hardware-based safety core provides the logic circuitry for delivering bradycardia therapy in the form of synchronous pacing in the event of a fault which disables operation of the device's primary control circuitry. The safety core pacemaker eliminates common mode failure of the primary control circuits used in the primary pacing system. Failures in the primary controller memory or execution will activate the safety core pacemaker.

System and method for providing bradycardia therapy by implantable device in presence of system faults

A system and method for storing episodic data collected by an implantable medical device. If there are no unallocated storage locations, collected data associated with an episode is stored in locations that are freed from allocations to previous episodes. The least recently allocated of the storage locations allocated to episodes of a lower priority type may be freed first in order to maintain storage of higher priority episodic data. The method and system also allows a specified ratio of stored data allocated to episodes of one priority type to that of another priority type to be maintained.

Growing community of inventors

Plymouth, MN, United States of America

Hiten J Doshi