Advanced Micro Devices Corporation

Hisayuki Shimada

Wing Han Leung

A flash memory device and a method to erase the flash memory device having a plurality of memory cells each having a source, a drain, a control gate, wherein the memory cells are organized in rows and columns with a wordline attached to the control gates of the memory cells in a row, with a bitline attached to the drains of cells in a column and a sourceline attached to the sources of cells in a row, and a switch connected between each sourceline and V,is controlled by sourceline decode circuit that opens a sourceline switch after the cells on the associated wordline verify as erased.

Decoded source lines to tighten erase Vt distribution

A flash memory device and a method to read the flash memory device to decrease leakage current during read. The flash memory device has a source line control circuit connected to the sources of memory cells in a row and during read the source line control circuit connects the sources of the memory cells in a row to ground.

Growing community of inventors

San Jose, CA, United States of America

Hisayuki Shimada