Mitsubishi Denki Kabushiki Kaisha

Renesas Technology Corp.

Renesas Electronics Corporation

Hisayasu Sato

Hiroshi Komurasaki

Takaya Maruyama

Tomohiro Sano

Takahiro Miki

Toshio Kumamoto

Yasushi Hashizume

Harufusa Kondoh

Kimio Ueda

The present invention intends to provide a filter circuit in which an area occupied by the circuit can be reduced by suppressing the scale of its circuit configuration while a predetermined vicinity disturbance wave rejection ratio is maintained and a communication semiconductor device using the same, the filter circuit filtering an analog signal and including a voltage/current conversion circuit for converting the analog signal from voltage to current, and a capacitor array which executes signal processing by charging/discharging the current converted by the voltage/current conversion circuit to/from plural capacitors, the capacitor array being so constructed that the plural capacitors are divided to plural stages so that signals averaged by the capacitor on a preceding stage are accumulated in the capacitor on a next stage successively.

Filter circuit and communication semiconductor device using the same

A frequency mixer includes a first N channel MOS transistor, second and third N channel MOS transistors constituting a local oscillator signal differential pair, and having substantially identical properties, a first load, and a second load. The first N channel MOS transistor receives an RF signal at its gate. A local oscillator signal is applied to the gates of the second and third N channel MOS transistors. The drain current of the second and third N channel MOS transistors is output to the drain of the first N channel MOS transistor. An amplitude-current conversion circuit receives the RF signal and provides an output current to the drain of the first N channel MOS transistor to decrease monotonously the output current with respect to the amplitude of the RF signal.

Frequency mixer preventing degradation in linearity on amplitude of input signal

An oscillator circuit is formed of a differential LC resonant circuit formed of an L load differential circuit including inductance-variable portions and a capacitor element, and a positive feedback circuit formed of N-channel MOS transistors. The inductance-variable portion is configured to vary the inductance by selecting a plurality of switch circuits arranged between a plurality of arbitrary positions on a spiral interconnection layer and the input/output terminal, and thereby can control an oscillation frequency. The inductance-variable portions form an inductor pair when the switch circuit among the switch circuits coupled between the first input/output terminals is turned on together with the switch circuit.

Oscillator circuit and L load differential circuit achieving a wide oscillation frequency range and low phase noise characteristics

An oscillator circuit is formed of a differential LC resonant circuit formed of an L load differential circuit including inductance-variable portions and a capacitive element, and a positive feedback circuit formed of N-channel MOS transistors. The inductance-variable portion is configured to vary the inductance by selecting a plurality of switch circuits arranged between a plurality of arbitrary positions on a spiral interconnection layer and the input/output terminal, and thereby can control an oscillation frequency. The inductance-variable portions form an inductor pair when the switch circuit among the switch circuits coupled between the first input/output terminals is turned on together with the switch circuit.

A mixer circuit according to the present invention includes a first differential transistor pair of two transistors, a second differential transistor pair of two transistors, an impedance element connected to the first differential transistor pair, an impedance element connected to the second differential transistor pair, an inductor connected to nodes A, B, a current source connected to node A, a current source connected to node B, and a capacitor. A mixer circuit with high conversion gain and small distortion can be obtained.

Mixer circuit having component for frequency conversion

There is provided a frequency voltage converter comprises a first transmission line for transmitting an input signal and a second transmission line provided with a delay line circuit, a third transmission line for transmitting a reference signal and a fourth transmission line provided with a delay line circuit, a mixer circuit, and a locked loop having a control circuit for outputting the same control signal to control portions of both delay line circuits so that the amount of a delay by the delay line circuit reaches one cycle of the reference signal, thereby holding linearity with respect to the frequency of a modulated wave signal and executing frequency voltage conversion even when a center frequency is low.

Frequency voltage converter

A mixer circuit includes a first signal input terminal connected to the gate of a first MOSFET, and a second signal input terminal connected to the gate of a second MOSFET. The mixer circuit is configured such that a relationship (V &minus;V )<(V &minus;V ) is established, where V is a bias voltage applied to the gate of the first MOS transistor, V is a bias voltage applied to the gate of the second MOS transistor, and V is a threshold voltage of the first MOS transistor, the bias voltages V and V being each defined with respect to the source bias voltage of the second MOS transistor. This can implement high linearity mixer circuit even when operated at a low power supply voltage.

High linearity, high gain mixer circuit

A gain control circuit includes a first path block for a gain control voltage and a second path block for a reference voltage. The first path block includes a voltage-current linear conversion unit for outputting a current which is proportional to a gain control voltage V.sub.ctrl, and which is inversely proportional to a resistivity, and also includes a temperature characteristic compensation unit for mirroring the current output by the voltage-current linear conversion unit and outputting a current I.sub.ctrl which is proportional to the gain control voltage V.sub.ctrl and an absolute temperature, and which is inversely proportional to the resistivity. The second path block has the same construction as the first path block except that it receives a reference voltage V.sub.ref and outputs a current I.sub.ref. The current I.sub.ctrl and the current I.sub.ref are supplied to a variable- gain cell so as to produce a voltage gain A.sub.v not affected by a variation in temperature.

Gain control circuit for controlling operation of a variable-gain

The output circuit according to the present invention includes a bipolar transistor (Q.sub.1), a resistance (R.sub.1) and a constant current source. The transistor (Q.sub.1) has its collector connected to a power supply node (V.sub.CC), its emitter connected to an output node (Do), and its base connected to the other end of the resistance (R.sub.1). The resistance (R.sub.1) has one end connected to the power supply node (V.sub.CC). The constant current source is connected between a power supply node (V.sub.EE) and the base of the transistor (Q.sub.1) and is turned on/off in response to an input signal (IN) to generate a current (I.sub.1) for bringing output into a low level only in the on state. The constant current source does not generate the current (I.sub.1) at the time of output of a high level, and causes the current (I.sub.1) to flow through the resistance (R.sub.1) only at the time of output of a low level. As a result, power consumption can be reduced.

Growing community of inventors

Hyogo, Japan

Hisayasu Sato