Sanyo Electric Co., Ltd.

Denso Corporation

Kabushiki Kaisha Toyota Chuo Kenkyusho

Denso Corporaiton

Hisanori Uda

Hiroaki Hayashi

Tetsuro Sawai

Yasoo Harada

Masao Nishida

Toshikazu Imaoka

Toshikazu Hirai

Kazuo Mizuno

Ryu Kimura

Yasuyuki Miyake

Yoshiyuki Kago

Yukiomi Tanaka

Kazuhiko Endo

Keiichi Honda

Tsutomu Yamaguchi

Shigeyuki Okamoto

Seiichi Banba

Noriyoshi Suzuki

Tetsuya Katayama

Tomohisa Harada

Tsutayuki Shibata

Nobuo Itoh

An active poly-phase filter has a converting section and a filtering section having two first input terminals, two second input terminals and four output terminals. The converting section has first, second, fourth and fifth transistors forming a translinear circuit and a third transistor forming a current mirror circuit with the second transistor. The converting section converts unbalanced high-frequency power into a difference input between a collector current of the third transistor and a collector current of the first transistor having phase difference of &#x3c0; radians. The filtering section receives one collector current at the first input terminals and receives another collector current at the second input terminals and outputs a first difference output between outputs of two output terminals and a second difference output between outputs of other two output terminals such that the difference outputs has a phase difference of &#x3c0;/2 radians.

Active polyphase filter producing two difference outputs having phase difference of &#x3c0;/2 radians

The digital signal processor is for correcting a DC output at an output terminal of an internal circuit of an analog circuit device. The digital signal processor includes a digital register for storing a digital value, a D/A converter for converting the digital value stored in the digital register into an analog voltage and applying the converted analog voltage to the output terminal as the DC output, a polarity determining circuit which outputs a first signal when an analog DC voltage at a reference correction point different from the output terminal in the internal circuit is higher than a predetermined threshold value and otherwise outputs a second signal, and an updating function configured to monotonously increase or decrease the digital value stored in the digital register while a predetermined one of the first and second signals is outputted from the polarity determining circuit.

Digital signal processor

A microstrip line includes a signal strip conductor and a ground conductor. A coplanar line includes two regions. A first region includes a signal strip conductor which is connected to the signal strip conductor of the microstrip line via a wire or the like and a ground strip conductor which continues to the ground conductor. A second region is formed with a ground strip conductor formed above the ground strip conductor via a through hole. A transmission mode changes itself in the microstrip line, the first region of the coplanar line, and the second region of the coplanar line in the sequence as described. This enables converting the transmission mode efficiently from the microstrip line to the coplanar line.

High frequency circuit board converting a transmission mode of high frequency signals

With a capacitor C inserted in an interstage portion of multiple stages of amplifier circuits, a high pass filter is generated by the capacitor C and an input impedance |Z| of an amplifier circuit in the next stage. Accordingly, frequency components lower than a cutoff frequency fc are cut off, and therefore are not transferred to the subsequent stage. However, radio frequency components higher than or equal to a fundamental wave component determined by an envelope of a radio frequency signal intermittently transmitted can be transferred. Consequently, transfer of DC offset potentials can be cut off, and noise, such as flicker noise, having great power in a DC or near-DC zone can be effectively cut off. Thereby, the S/N ratio, detection sensitivity, and detection accuracy can be improved.

Activation signal output circuit having multiple amplifier circuits

Two lines Ai(i=1 or 2) are connected to an input terminal In. The line Ais grounded via a capacitor C. The line Aand a line Bform a coupled line. One end of the line Bis connected to a positive pole of a diode Dwhich is grounded at its negative pole. Lines Band Bare connected to the other end of the line B. The other end of the line Bis connected to a capacitor Cwhich is grounded at its other end and a resistor Rwhich is connected to a voltage control terminal Vat its other end. The other end of the line Bis connected to the positive pole of a diode D. The line Band the line Aform a coupled line. One end of the line Ais connected to an output terminal Out-i, and the other end is grounded via a capacitor C. The output of the terminals Out-are switched to 5.8 GHz band, 4.8 GHz band and cut-off, by applying to Vand Vthree potentials, that is, ground potential. positive potential which causes no current flow and positive potential which causes current flow.

Filtering type frequency switching circuit

A start signal outputting circuit according to the invention has a differential RF/DC convertor partfor converting a high frequency power (RF) into a d.c. potential (DC). The RF/DC convertor partis formed by two transistors Q, Qworking as a diode, and transistors Q, Qand resistances Rfor forming high resistances at anode sides and cathode sides of these diodes, respectively. A differential amplification partdisposed at a later stage of the diode has not only amplifying effect but also low-pass filtering effect together with filtering parsof its previous and later stages. In this case, it is designed so that current flowing through the respective circuits is about 2&#x2dc;3 &#x3bc;A. As a result, even if the high frequency power of the specified frequency is weak, for example &#x2212;60&#x2dc;&#x2212;40 dBm, a start signal outputting circuitwhich outputs a d.c. potential of 0.3&#x2dc;2.4V, is suitable for integration and has a low power consumption can be obtained.

Start signal outputting circuit

A start signal output circuit having an RF/DC conversion circuit to which radio frequency power (RF) of specified frequency is inputted and from which a direct current potential (DC) is outputted, comprises a detection/amplification circuitwhich includes a voltage doubler wave-detector circuitconfigured including a sensing diode Q(Tr) for sensing the RF power, a differential amplifier including differential pair transistors Trand Tr, and a current mirror circuit. A base current of one Trof the differential pair transistors is brought into substantial agreement with a DC component of a current flowing through the sensing diode Q(Tr). A total of currents flowing through the differential pair transistors Trand Tris regulated to a substantially constant value by the current mirror circuit. Thus, the start signal output circuit which is small in size, high in sensitivity and low in power consumption can be realized.

Activation signal output circuit and determination circuit

A receiver configured to receive a plurality of signals k (k=1, 2, . . . , M) allocated in a first frequency band. The receiver includes a frequency conversion section for reallocating the signals k in a second frequency band for sampling by a single AD converter at a sampling frequency fsuch that digital data of the sampled signals k are obtained in a third frequency band extending from zero Hz to a frequency represented by f/2; and a signal extraction section for extracting a target base band signal k from the digital data obtained by the AD conversion section. The frequency conversion section performs the reallocation in such a manner that at least a frequency represented by Jf/2 (J is an integer) is located between the frequencies of at least two of the signals k and that the sampled signals do not overlap.

Receiver apparatus

In a distributed constant circuit, a first line is connected between a first node and a second node. The first node is grounded through a series connection between a first capacitor and a second line, and the second node is grounded through a series connection between a second capacitor and a third line. The parameters of the first, second and third lines and the first and second capacitors satisfy a predetermined relational expression such that characteristics equivalent to a &lgr;/4 line are obtained with respect to the frequency of a fundamental wave, and the second and third lines and the first and second capacitors respectively resonate with respect to an arbitrary frequency.

Distributed constant circuit in an amplifier

A switching circuit device including a multi-gate field effect transistor having a plurality of gate electrodes between a drain electrode and a source electrode, a low resistor having its one end connected between the gate electrodes, and a high resistor connected between the other end of the low resistor and any one of the drain electrode, the source electrode and the end of the other low resistor.

Switching circuit device and semiconductor device

In a distributed constant circuit, a first line is connected between a first node and a second node. The first node is grounded through a series connection between a first capacitor and a second line, and the second node is grounded through a series connection between a second capacitor and a third line. The parameters of the first, second and third lines and the first and second capacitors satisfy a predetermined relational expression such that characteristics equivalent to a .lambda./4 line are obtained with respect to the frequency of a fundamental wave, and the second and third lines and the first and second capacitors respectively resonate with respect to an arbitrary frequency.

Distributed constant circuit

A capacitor is connected between the gate of an FET and an input node, and a resistor is connected between the input node and a ground terminal, thereby preventing the FET from oscillating in a low-frequency domain. A capacitor is connected between the drain of the FET and a ground terminal, or a line and a capacitor are connected in series between the drain of the FET and a ground terminal, thereby preventing the FET from oscillating in a high-frequency domain or at a specific frequency in the high-frequency domain.

Stabilizing circuit and amplifier

A plurality of FETs have their respective gates connected to each other through a first line and their respective drains connected to each other through a second line. A gate bias is applied to the gate of each FET through the first line and a drain bias is applied to the drain of each FET through the second line. A first matching circuit includes first capacitors connected to the signal path, inductors each connected between one end of each first capacitor and the ground potential, and second capacitors each connected between the other end of each first capacitor and the ground potential. The second matching circuit includes first capacitors each connected to the signal path, second capacitors each connected between one end of each first capacitor and the ground potential, and inductors each connected between the other end of each first capacitor and the ground potential.

Power amplifier and chip carrier

A first FET is connected between first and third nodes, a second FET is connected between second and fourth nodes, a third FET is connected between third and fifth nodes and a fourth FET is connected between fourth and fifth nodes. A fifth FET is connected between first and sixth nodes and a sixth FET is connected between second and sixth nodes. The gates of the first, fourth and sixth FETs are connected to a first control terminal and the gates of the second, third and fifth FETs are connected to a second control terminal. A power-supply terminal is connected to the fifth and sixth nodes. The first and second nodes are connected to a common terminal through first and second capacitors, respectively. The fifth and sixth FETs form a pull-up switching circuit. The pull-up switching circuit pulls up the source of an FET in an OFF state to the power-supply voltage and isolates the source of an FET in an ON state from the power-supply voltage.

Switch circuit device

A communication apparatus for use in a portable telephone is disclosed which has a transmit-receive common amplifier for amplifying a transmitted signal or received signal, and a mixer for frequency-mixing the transmitted signal or the received signal with a local oscillator output, wherein connection between the mixer and an input side of the amplifier and connection between the mixer and an output side of the amplifier are made by means of respective signal-path selector switches. During reception, a deep bias is applied to an FET of the transmit-receive common amplifier to reduce current consumption, and during transmission, a shallow bias is applied to the FET of the transmit-receive common amplifier for increased output.

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Nagoya, Japan

Hisanori Uda