Fujitsu Corporation

Nippon Telegraph and Telephone Corporation

Hisako Watanabe

Masaaki Kawai

Haruo Yamashita

Kazuyuki Tajima

Hidetoshi Naito

Tomoyuki Ohtsuka

Kazuyuki Mori

Yuji Takizawa

Tadashi Ikeuchi

Yuji Takigawa

A light emitting element driving circuit which drives a light emitting element including the following. A drive transistor is coupled to a power supply voltage and is provided on a side of an anode of the light emitting element. The drive transistor receives an input signal and supplies the light emitting element with a pulse current and a bias current. A cathode of the light emitting element is connected to a lower potential than the power supply voltage.

Light emitting element driving circuit and light emitting device having

A reference-voltage generator controls the level of a reference voltage in dependence upon temperature, and a drive-current supply unit passes a drive current through a semiconductor laser when the voltage of an input signal is greater than (or less than) the reference voltage. Even if a threshold-value current of the semiconductor laser increases owing to a rise in ambient temperature, as a result of which there is an increase in the delay time of the optical power waveform of the laser, the reference voltage declines in conformity with the temperature rise and the time at which drive current begins to flow into the semiconductor laser is made earlier. This offsets the delay time so that a stabilized optical power waveform and optical output power are generated. In addition, a drive-current controller increases the value of drive current in conformity with a rise in temperature. As a result, the drive current which flows through the semiconductor laser increases in dependence upon the temperature rise. A stabilized optical output power is thus generated.

Semiconductor laser drive

A cross-connection apparatus for B-ISDN includes plural interface units, multiplexers, virtual path identifier (VPI) conversion tables, demultiplexers, and loop-back units and a switch unit. The interface unit has a reception port for receiving an ATM cell or inserting a monitor cell, and a transmission port for transferring the ATM cell or extracting the monitor cell; The multiplexer is operatively connected to corresponding interface unit for multiplexing the monitor cell; The VPI conversion tables is operatively connected to corresponding multiplexer for converting the VPI to change a transmission route of the monitor cell; The switch unit is operatively connected to the VPI conversion tables for switching the transmission route of the monitor cell based on the VPI; The demultiplexer is operatively connected to the switch unit for demultiplexing the monitor cell and transferring the monitor cell to the transmission port; The loop-back unit is operatively connected to corresponding interface unit for changing the transmission route so as to transfer the monitor cell to the same interface unit which the monitor cell is inserted, and as a result, the apparatus can be monitored by comparing the inserted monitor cell with the extracted monitor cell in the same interface unit.

Cross-connection apparatus for B-ISDN

A system for monitoring an ATM cross-connecting apparatus by inputting a test cell through a path for a main signal into the ATM cross-connecting apparatus, and examining the cell after the cell passed through the ATM cross-connecting apparatus. An initial value of a PN sequence and the PN sequence generated based on the initial bit sequence is written in the test cell before inputting to the ATM cross-connecting apparatus. When examining the test cell, the initial bit sequence and the PN sequence are read from the cell, a PN sequence is generated based on the initial bit sequence, and the generated pseudo-noise sequence is then compared with the PN sequence read from the test cell to detect an error in the test cell. In addition, a bit pattern indicating a primitive polynomial to generate the PN sequence may be written in the test cell. In this case, the bit pattern is used for generating the PN sequence when examining the test cell. Further, the same VPI values may be written in both the header and the information field of the test cell before inputting the cell to the ATM cross-connecting apparatus, and the VPI value in the information field is compared with a VPI value in the header of the test cell when examining the test cell.

System for monitoring ATM cross-connecting apparatus by inside-apparatus

A circuit for generating a discrimination voltage level V.sub.ref which is used as a reference voltage to discriminate between two adjacent logic levels or an input signal which can have a plurality of different voltage levels generally corresponding to a plurality of respective, different logic levels. The frequency at which the levels of the input signals lie in the upper half of the vicinity (i.e., the voltage range from the level V.sub.ref -.DELTA.V to the level V.sub.ref +.DELTA.V) of the discrimination voltage level (i.e., the 'upper half' thereof being the voltage range from V.sub.ref to V.sub.ref +.DELTA.V, '.DELTA.V' being a predetermined off-set value) and the frequency at which the levels of the input signals lie in the lower half of the vicinity (i.e., as above defined) of the discrimination level (i.e., the 'low half' thereof being the voltage range from V.sub.ref -.DELTA.V to V.sub.ref) are compared, and the discrimination level is controlled so that the above two frequencies are the same.

Circuit for generating discrimination voltage level

A phase shift circuit used in a regenerating repeater, includes a separating unit for separating an input signal into two separate signals having a phase difference of a phase angle of 90.degree. therebetween, one separated signal having a '0' phase and the other separated signal having a '.pi./2' phase. A distributing unit distributes the '0' phase separated signal and '.pi./2' phase separated signal as three distributed signals having phase difference of phase angles of 90.degree. and 180.degree. therebetween, one distributed signal having a '0' phase and the others being a '.pi./2' phase distributed signal and a '.pi.' phase distributed signal. A weighting/compounding unit analyzes the '0' phase distributed signal, '.pi./2' phase distributed signal, and '.pi.' phase distributed signal regarding a plurality of phase signals each having a phase shift extent, compounds each of the phase signals after being weighted by each amplitude, the weighting being performed by a weight control signal applied from an external stage, and generates an output signal adding a phase shift proportional to the weight to the input signal.

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Kawasaki, Japan

Hisako Watanabe