Matsushita Electric Industrial Co., Ltd.

Hisaki Watanabe

Masato Maede

Masahiro Gion

Masaya Hirose

Kinya Daio

Shigeki Furuya

Atsushi Mototani

There is provided a power switching circuit capable of completely breaking a current in an OFF state of a switch connecting power sources even when a voltage difference is generated between the power sources of a plurality of functional blocks separated from each other on an LSI chip. A gate control circuithas a control signal terminal INCNT, a first power imputer terminal IG, and a second power supply terminal IGas input terminals and has a first output terminal OGand a second output terminal OGas output terminals. The gate of a second P-type transistor Pis connected to the first output terminal OGof the gate control circuitand the gate of a second P-type transistor Pis connected to the second output terminal OGof the gate control circuit, wherein the first P-type transistor Pand the second P-type transistor Pare connected in series between a first power source VDDand a second power source VDDto form a switch section.

Power switching circuit

In a CMOS basic cell used in fabrication of a gate array semiconductor integrated circuit, each of the gate and the diffusion region of a P-channel transistor is in a hooked shape having bent parts respectively bending to the left and right at the upper and lower portions thereof. Similarly, each of the gate and the diffusion region of an N-channel transistor is in a hooked shape having bent parts respectively bending to the left and right at the upper and lower portions thereof. In the case where a semiconductor integrated circuit is fabricated by arranging basic cells having the same structure on the right and left hand sides of this basic cell, the basic cells adjacent to each other are overlapped by portions thereof corresponding to one grid, so that the portions in the hooked shapes can be alternately inlaid with each other. Accordingly, the semiconductor integrated circuit attains a smaller layout area.

CMOS basic cell and method for fabricating semiconductor integrated circuit using the same

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Osaka, Japan

Hisaki Watanabe