Fujitsu Corporation

Hisakazu Ohmori

Yoshinori Ishii

Tetsuo Tachibana

Ryoichi Ishibashi

Masakazu Oi

Yukio Furukawa

Akihiko Takada

A phase-comparison bit synchronizing circuit for establishing bit phase synchronization of signals transmitted by way of TDMA can reproduce data properly even in the presence of disturbance. A plurality of phase shifting units shift the phase of a given burst signal in a received frame, and a bit phase synchronizing unit synchronizes the bit phases of output signals from the phase shifting units. A determining unit determines an optimum one of the phase shifting units, and a first selecting/outputting unit selects and outputs a signal which is produced when the given burst signal is shifted in phase by the optimum phase shifting unit. A memory unit stores the identification code of the phase shifting unit which is determined by the determining unit. A second selecting/outputting unit selects a signal produced when a burst signal in a next or succeeding received frame which corresponds to the given burst signal is shifted by the phase shifting unit whose identification code has been stored by the memory unit, and synchronized in bit phase by the bit phase synchronizing unit, and outputs the selected signal as bit reproduced data.

Phase-comparison bit synchronizing circuit

A power supplying system is adapted to a subscriber terminating equipment that supplies power to a subscriber terminal equipment based on a supply of power from an external power supply part. The power supplying system includes an excess current limiting circuit stopping a supply of power within the subscriber terminating equipment when an excess current is generated in the supply of power from the external power supplying part, and an excess current detection circuit detecting an excess current state.

Power supplying system for terminal

Digital termination equipment for use in signal transmission over a 2-wire subscriber line through an interface transformer includes an impedance unit functionally provided between the 2-wire subscriber line and the interface transformer for generating a high impedance when a current more than a predetermined current value flows therein. A power supply unit is provided having first and second terminals. The first terminal is connected to a winding of the interface transformer for supplying a voltage to the impedance unit through the winding. A current path forming circuit is connected to the impedance unit and to the second terminal of the power supply unit for forming a current path between the impedance unit and the second terminal of the power supply unit when a voltage more than a predetermined voltage value is applied. The power supply unit includes a dc power source and a switch connected in series to the dc power source. The switch is turned on when a local loopback testing is executed.

Digital transmission equipment

System for controlling access competition among a plurality of terminals under the DQDB protocol in a B-ISDN where the terminals are electrically connected to a dual bus with a downbus and an upbus extending from a network terminal. Each of the terminals has data transmission processor, downbus processor, upbus processor, a timer and failure detector. When data transmission request is issued from the data transmission processor, the failure detector is activated in response to a request to start the timer so as to count a given time interval which has elapsed. If either a request message or data cannot be sent even when the timer reaches a predetermined value, the failure detects signals that a failure has occurred in the dual bus.

System for detecting failure in dual bus user network

A method for detecting a PN (Pseudo Noise) pattern for a remote loopback test in a communication system includes the following first through fifth steps. The first step receives a first n-bit pattern (n is an arbitrary number) which is a part of the PN pattern. The second step leftwardly shifts n bits of the first n-bit pattern by a first number of bits, so that a second n-bit pattern is generated. The third step executes an exclusive-OR operation on the n bits of the first n-bit pattern and n bits of the second n-bit pattern, so that a third n-bit pattern is generated. The fourth step rightwardly shifts n bits of the third n-bit pattern by a second number of bits, so that a fourth n-bit pattern is generated. The fifth step executes an exclusive-OR operation on the n bits of the third n-bit patterns and n bits of the fourth n-bit patterns, so that a fifth n-bit pattern is generated. The fifth n-bit pattern is a sixth n-bit pattern which is received after the first n-bit pattern. The first through fifth are repeatedly carried out each time n bits of the first n-bit pattern are received at the first step until a pattern detection signal is generated to activate the loopback test procedure when the fifth n-bit pattern and the sixth n-bit pattern become identical for a number of times.

Method and apparatus for detecting pseudo noise pattern for remote

An undershoot eliminating circuit is provided between a pulse transformer of a pulse transmitter coupled to a transmission line and a pulse transformer driving circuit for driving the pulse transformer. The pulse transformer driving circuit has an impedance high enough to cause the pulse transmitter to be substantially isolated from the transmission line. The undershoot eliminating circuit includes a capacitor, and a switching unit. The switching unit is connected to the capacitor, and has the function of selectively connecting the capacitor to the pulse transformer driving circuit and the pulse transformer in parallel on the basis of a voltage based on a pulse wave generated by the pulse transformer driving circuit and applied across the switching unit.

Pulse transmission circuit with undershoot eliminating circuitry

A loopback test starting system is provided for starting a loopback test. The loopback test starting system includes a first loopback controller which detects a first loopback control signal from a digital data services network side and generates a first loopback starting signal. In addition, a second loopback controller is provided which detects a second loopback control signal from a subscriber side and generates a second loopback starting signal in response. The loopback test starting system also includes a first loopback forming device which forms a first loop from the digital data services network side through the subscriber side and back to the digital data services network side, and a second loopback forming device which forms a second loop from the subscriber's side through the digital data services side and back to the subscriber side. Further, the loopback testing starting system includes first and second loopback detection and resetting devices for resetting and stopping the detection operations of the first and second loopback controllers. Based on this above configuration, the loopback test starting system is able to avoid a loopback closed circuit with out prohibiting a loopback test from the subscriber's side, thus improving the quality of the maintenance control of the entire network.

Growing community of inventors

Kawasaki, Japan

Hisakazu Ohmori