Matsushita Electric Industrial Co., Ltd.

Panasonic Intellectual Property Management Co., Ltd.

Hisaji Murata

Hideto Motomura

Jeffry Fernando

Toshihiro Miyoshi

Yuya Sugasawa

Koichi Emura

Masanaga Tsuji

Takao Kashiro

Eriko Ohdachi

Manabu Yumine

Sahim Kourkouss

Ken Yasue

Katsuhisa Yano

Even when data that can belong to a new class that is not in an existing class is input, this data can be easily classified appropriately. Classification system includes input reception part, classification part, calculation part, determination part, and presentation part. Input reception part receives an input of target data. Classification part classifies the target data into any one of a plurality of classes. Calculation part calculates a feature amount of the target data. Determination part determines a possibility that the target data is classified into the new class based on a classification result in classification part and the feature amount of the target data calculated by calculation part. When determination part determines that there is a possibility that the target data is classified into the new class, presentation part presents a determination result of determination part.

Classification system and classification method

Reliability regarding a class determination for an object is improved. Classification system includes first classification part, second classification part, and determination part. First classification part classifies first target data into at least one of a plurality of first classes. Second classification part classifies second target data into at least one of a plurality of second classes. Determination part decides whether to use one or both of a first classification result that is a classification result obtained by first classification part and a second classification result that is a classification result obtained by second classification part, and determines a class of object based on one or both of them. The first target data is image data of object. The second target data is manufacturing data regarding a manufacturing condition of object.

Classification system and classification method using lerned model and model including data distribution

An image display system includes a first processor, a second processor, and a comparator. The first processor acquires a behavior estimation result of a vehicle, and generates future position information after a predetermined time passes of the vehicle based on the behavior estimation result. The second processor acquires present information about the vehicle, and generates present position information on the vehicle and a peripheral object based on the acquired information. The comparator compares the future position information on the vehicle and the present position information on the vehicle and the peripheral object, and generates present image data indicating present positions of the vehicle and the peripheral object and future image data indicating future positions of the vehicle and the peripheral object. Further, the comparator allows a notification device to display a present image based on the present image data and a future image based on the future image data together.

Image display system, image display method, and recording medium

A DD converter circuit for interpolating a digital video signal which is locked to a 14.3-MHz burst clock to convert the sampling data so as to be locked to a 13.5-NHz free-run clock, and a frame memory circuit for writing a digital video signal which is output by the DD converter circuit on the 14.3-MHz burst clock as well as reading the written digital video signal on a 13.5-MHz clock S are included. Therefore, a video signal processor which can realize the rate conversion of the digital video signal without using an analog PLL circuit can be provided.

Sampling frequency converter, sampling frequency conversion method, video signal processor, and video signal processing method

An analog-to-digital converter for converting an analog television signal to a signal in compliance with a digital encoding standard is provided. The analog-to-digital converter according to the invention comprises an A-D converter circuit for converting an analog television signal to a 2 -bit digital signal, a synchronizing signal detecting circuit for detecting a synchronizing signal from the digital signal received from the A-D converter circuit, a Y/C separating circuit for separating a luminance signal and a carrier chrominance signal from the digital signal from the A-D converter circuit using the synchronizing signal from the synchronizing signal detecting circuit, a synchronizing signal converter circuit for converting a synchronizing signal portion of the luminance signal into a predetermined value, and a digital amplifying circuit for digitally amplifying the signal level from the synchronizing signal converter by a predetermined multiple value specified by a standard for communication or for video signal apparatus. The digital amplifying circuit may be composed of a shifter. A low pass filter may be used additionally to eliminate rounding errors. Further, depending on the type of video signal, the low pass filter may be bypassed.

Video signal level converting device and video signal analog-to-digital converter

A video signal processing apparatus processes coded data obtained by compressively coding a digitized video signal. The apparatus includes a specific component removing unit for removing specific components in the coded data. The specific component removing unit has a variable-length decoding unit for subjecting the variable-length coded data to variable-length decoding, an inverse quantization unit for inversely quantizing the processing result of the variable-length decoding unit, by using a first quantization matrix, a quantization unit for quantizing the processing result of the inverse quantization unit, by using a second quantization matrix, and a variable-length coding unit for subjecting the processing result of the quantization unit to variable-length coding. Therefore, the data quantity of the variable-length coded data can be reduced without significantly increasing the circuit scale.

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Osaka, Japan

Hisaji Murata