Kabushiki Kaisha Toshiba

Panasonic Corporation

Mayekawa Mfg. Co., Ltd.

Toshiba Memory Corporation

Matsushita Electric Industrial Co., Ltd.

Panosonic Corporation

Hiroyuki Usui

Kimihiro Imamura

Seiji Maeda

Osamu Goto

Takeshi Chimura

Takekuni Umehara

Tadakazu Seto

Yuuichi Kuratani

Yoshiyuki Muraoka

Hideki Kasahara

Haruya Nakai

Toru Okamoto

Gota Asano

Hajime Akabane

Nobuyuki Kawaguchi

Takashi Okawa

Kenichi Aoki

Takashi Ohkawa

Hiroyuki Kannari

Tomitake Omori

Takashi Ebihara

Tsuneyoshi Murakami

Shinichi Nishida

Jun Tanabe

Hiroki Takeshima

Masahiko Kato

Minoru Kouda

Ikuo Katsumata

Keiji Minamino

Tsuneo Ando

Masatoshi Hoshi

A clamping device for a bone-in limb meat according to an embodiment includes: a pair of clamp pieces for holding the bone-in limb meat; a support portion openably/closably supporting the pair of clamp pieces in respective base portions of the clamp pieces; and rotation suppressing portions for suppressing a rotation of the bone-in limb meat, the rotation suppressing portions being respectively disposed so as to protrude from surfaces of the pair of clamp pieces along a direction perpendicular to a plane including opening/closing directions of the pair of clamp pieces. In an opened state of the pair of clamp pieces, the pair of clamp pieces respectively have tip portions at positions closer to a center line between the pair of clamp pieces than the rotation suppressing portions and positions farther away from the support portion than the rotation suppressing portions in a direction along the center line.

Clamping device for bone-in limb meat, loading device for bone-in limb meat, and clamping method for bone-in limb meat

A clamping device for a bone-in limb meat according to an embodiment includes a pair of clamp pieces including a first clamp piece and a second clamp piece, and being openable/closable so as to hold a bone-in limb meat, and rotation suppressing portions for suppressing a rotation of the bone-in limb meat, the rotation suppressing portions being disposed at positions deviated with respect to the pair of clamp pieces in a direction perpendicular to a plane including an opening/closing direction of the pair of clamp pieces. The rotation suppressing portions include a projection portion disposed so as to protrude from the first clamp piece into a space between the pair of clamp pieces and configured to contact the bone-in limb meat when viewed from the direction perpendicular to the plane.

A loading system for bone-in limb meat according to an embodiment is a loading system for loading a bone-in limb meat to a processing portion, the loading system includes: an image capturing portion for capturing an image of the bone-in limb meat before being loaded to the processing portion; an image processing portion capable of acquiring orientation information of the bone-in thigh meat from the image of the bone-in limb meat captured by the image capturing portion; an openable/closable pair of clamp pieces for holding the bone-in limb meat; an arm supporting the pair of clamp pieces, and capable of controlling a position and orientation of the pair of clamp pieces; and a control portion controlling, based on the orientation information acquired by the image processing portion, an operation of the arm and thereby holding the bone-in limb meat, and loading the bone-in limb meat to the processing portion.

Loading system for bone-in limb meat

A clamping device for a bone-in limb meat according to an embodiment includes a base portion, a pair of clamp pieces mounted to the base portion and configured to hold a bone-in limb meat, and an orientation adjusting member for adjusting an orientation of the bone-in limb meat, the orientation adjusting member being mounted to the base portion independently of the pair of clamp pieces and having an inclined surface inclined at an acute angle with respect to a center line between the pair of clamp pieces. When the pair of clamp pieces are in an opened state, in a planar view, at least a part of the inclined surface of the orientation adjusting member is disposed so as to overlap a space formed between the pair of clamp pieces.

A data transfer apparatus according to an embodiment includes: a first main memory configured to store first data to be used by a first processor; a first hash table in which a hash value and address information of the first data stored in the first main memory are registered; and a data transfer unit configured to transfer data having a hash value not registered in the first hash table from among second data stored in a second main memory from the second main memory to the first main memory.

Data transfer apparatus and data transfer system

A cache device of an embodiment includes a tag/data memory. The tag/data memory includes a storage area capable of storing a plurality of pieces of tag data and a plurality of pieces of compressed cache data corresponding to the plurality of pieces of tag data; and each of the pieces of tag data includes a flag indicating whether the piece of tag data is a piece of tag data read last or not and a compression information field C indicating whether each of the pieces of cache data is compressed or not.

Cache device and method for storing tag data and cache data in cache device

A cache device has a data memory capable of storing a piece of first cache line data and a piece of second cache line data for first and second ways in compressed form, and a tag memory configured to store, for each of the pieces of cache line data, a piece of tag data including uncompressed data writing state information, an absence flag, and a compression information field. In case of modifying only part of a cache line, i.e., a partial write, a request converter converts a write request into a read request, and a read-out piece of data is decompressed and written in a write status buffer. Data may be written from the write status buffer to the data memory without being compressed, which eliminates a need for decompression and compression for every writing or modifying operation of a piece of partial data, thereby reducing latency and power consumption.

Cache device and semiconductor device including a tag memory storing absence, compression and write state information

An information processing device of an embodiment has an input unit, a storage unit, a read control unit, and a write control unit. A read request and a write request are input to the input unit. The storage unit stores management information. When the read request is input, the read control unit reads read data including the management information from the storage unit, references the management information, and outputs only non-zero data included in a predetermined range of a block row. The write control unit writes only non-zero data to the storage unit and updates the management information immediately before a start position of the continuous non-zero data started from a largest position in the continuous non-zero data started from a position smaller than the predetermined range, a last management information stored in the predetermined range, and the last management information in the predetermined range.

Information processing device and data structure

According to an embodiment, a matrix operation apparatus executing a matrix operation includes multiple nodes, the nodes including: a multiplier configured to perform a first operation for a first input, which is column data and a second input which is row data for the matrix operation and output element components of an operation result of the matrix operation; and an accumulator configured to perform cumulative addition of operation results of the multiplier.

Matrix operation apparatus

An information processing apparatus includes a system memory, a cache system that includes a cache memory, and a plurality of cores, each of which accesses the system memory and the cache memory. The cache system stores in a cache line of the cache memory a break indicator that designates one or more of the plurality of cores. The cache system determine whether a first core in the plurality of cores that issues a request to read data from an address that corresponds to the cache line in which the break indicator is stored matches one of the cores designated by the break indicator. If the first core matches one of the cores designated by the break indicator, the cache system returns a break command to the first core. If the first core does not match one of the cores designated by the break indicator, the cache system returns the data to the first core.

Information processing apparatus and debugging method

A microprocessor has a plurality of debug modules, multiple sets of processor cores provided corresponding to the debug modules so that each set of the processor cores are debugged by the corresponding debug module, and a plurality of debug ring units provided corresponding to the debug modules, each debug ring unit generating a debug ring signal for instructing the corresponding processor cores to transit to a debug mode. The debug ring units are connected to generate a ring and sequentially transmit the debug ring signal, and when receiving the debug ring signal, each debug ring unit outputs, to the corresponding debug module, a debug transition signal for instructing the corresponding processor cores to transit to the debug mode.

Multiprocessor with a plurality of debug modules and debug ring units connected to generate a ring

According to one embodiment, an information processor includes an operator and an address protector. The address protector includes a register access interface, an address table, and an access determination module. The register access interface is configured to receive address protection information from the operator. The address table is configured to store the received address protection information. The access determination module is configured to determine whether an access to an address specified by the operator is allowable based on the address protection information, and configured to output an interrupt signal to the operator when the access is unallowable.

Information processor and multi-core system

According to one embodiment, each of routers includes: a cache mechanism that stores data transferred to the other routers or processor elements; and a unit that reads out, when an access generated from each of the processor elements is transferred thereto, if target data of the access is stored in the cache mechanism, the data from the cache mechanism and transmits the data to the processor element as a request source.

Multi-processor system with mesh topology routers comprising local cache storing for each data information indicating redundancy in neighbor router cache for cache management

An electrode mixture paste is applied on both sides of a strip of core material as it runs along its lengthwise direction, and the coating thickness of the paste is adjusted as the core material coated with the paste passes through a gap between a pair of scraper tools. Tips provided to the scraper tools scrape off the paste to form a paste-coated portion of a predetermined width. The electrode mixture paste scraped off with the tips is returned through recesses on the upstream side of the tips in the running direction of the core material, so as to prevent the phenomenon where the coating thickness is increased at both side edges of the paste-coated portion. Thus, a method for applying electrode mixture paste is realized that can prevent the phenomenon where the coating thickness is increased at both side edges of the paste-coated portion.

Apparatus for applying electrode mixture paste with homogeneous distribution of coating amount of electrode mixture paste

A nickel hydrogen storage battery is provided which includes an electrode assembly formed by winding spirally a strip-like negative electrode () and a strip-like positive electrode with a separator interposed therebetween, the strip-like negative electrode () having a mixture layer containing a hydrogen storage alloy disposed on a core material. The electrode assembly is contained in a bottomed cylindrical container such that the negative electrode () forms the outermost peripheral portion. A portion corresponding to an outermost peripheral portion () of the negative electrode is a thin portion, and the thin portion is bent in advance in the winding direction of the electrode assembly to form an arc shape. In this manner, when the spirally wound electrode assembly is configured, the outermost peripheral portion of the negative electrode is prevented from peeling from the electrode assembly, and thus the insertability into the bottomed cylindrical container is improved.

Growing community of inventors

Kanagawa, Japan

Hiroyuki Usui