Seiko Epson Corporation

Hiroyuki Takamiya

Takayuki Saiki

Shinya Sato

Junichi Karasawa

Takashi Kumagai

Satoru Kodaira

Satoru Ito

Hisanobu Ishiyama

Kazuhiro Maekawa

Takashi Fujise

A semiconductor device includes: a plurality of external terminals; a plurality of semiconductor substrates that are layered; a through electrode penetrating through at least one of the semiconductor substrates and electrically connected with any of the external terminals; and a plurality of electrostatic discharge protection circuits provided on any one of the semiconductor substrates. In the device, the through electrode is electrically connected with the plurality of electrostatic discharge protection circuits.

Semiconductor device and method for manufacturing semiconductor device

An integrated circuit device includes first and second transistors NTrand PTrpush-pull connected between first and second power supply lines and outputting a voltage of one of the first and second power supply lines to a connection node ND by a charge-pump operation, and a pad PD electrically connected with the connection node ND and electrically connected with a flying capacitor, to which a given voltage is applied at one end, at the other end of the flying capacitor. The pad PD is disposed in an upper layer of at least one of the first and second transistors NTrand PTrso that the pad PD overlaps part or the entirety of at least one of the first and second transistors NTrand PTr

Integrated circuit device and electronic instrument

A semiconductor device includes: a plurality of semiconductor substrates that are layered; a through electrode penetrating through a predetermined semiconductor substrate of the semiconductor substrates and electrically connected with an external terminal of the semiconductor device; a circuit element provided on the predetermined semiconductor substrate; and an electrostatic discharge protection circuit also provided on the predetermined semiconductor substrate. In the device, wiring resistance between the electrostatic discharge protection circuit and the through electrode is smaller than wiring resistance between the circuit element and the through electrode.

An integrated circuit device includes a pad PDx and an electrostatic discharge protection element ESDx formed in a rectangular region and electrically connected with the pad PDx. The pad PDx is disposed in an upper layer of the electrostatic discharge protection element ESDx so that an arrangement direction of the pads is parallel to a long side direction of the region in which the electrostatic discharge protection element ESDx is formed, and the pad PDx overlaps part or the entirety of the electrostatic discharge protection element ESDx.

An interface circuit is provided between a first circuit block and a second circuit block that operates using a power supply system differing from that of the first circuit block. An electrostatic discharge protection circuit that include a PN diode and a diffused resistor is formed in order to prevent electrostatic discharge destruction of a gate insulating film of a transistor that forms the interface circuit. The electrostatic discharge protection circuit may be formed using the remaining basic cells of a gate array that forms the second circuit block. An electrostatic discharge protection circuit formed of a bidirectional diode may be connected between a first low-potential power supply and a second low-potential power supply.

Growing community of inventors

Chino, Japan

Hiroyuki Takamiya