Fujitsu Corporation

Hiroyuki Shimono

Teruhiko Suzuki

Shuji Miyake

Satoshi Fukui

Tomoyuki Yamaguchi

Kazuhisa Kada

Toshiharu Sakai

Kunimitsu Itashiki

Toshikazu Ota

Masami Hashizume

A data transmission system which provides a better level of transmission quality, without being affected by skew variations. A serial-to-parallel converter reforms a serial data stream into a set of parallel data streams. A sync pattern inserter generates and inserts sync patterns to the parallel data streams. The resultant sync pattern-inclusive data streams are, however, distorted with some propagation delay skews when they arrive at the receiving end. A data retimer extracts a reference clock from one of the received data streams, and retimes all streams with that reference clock, thus producing a set of retimed data streams. An in-sync detector produces pulse signals indicating the presence of sync patterns in the retimed data streams and determines whether each of those streams is in in-sync state. A phase adjuster identifies the propagation delay skews by examining the pulse signals, and adjusts the phase of each data stream to eliminate them.

Data transmission system

In a parallel signal transmission device for converting serial signals into parallel signals at a transmitting unit to be transmitted to a receiving unit, the transmitting unit generates serial code signals from periodically latched parallel signals besides transmitted parallel signals, and adjusts phases of the parallel signals to the serial code signals by delaying the parallel signals by a predetermined delay time; and the receiving unit changes over bits of the parallel signals from the transmitting unit based on recovered clocks, detects bit shift amounts of the parallel signals after bit changeover, and performs skew adjustments of the parallel signals depending on the bit shift amounts.

Parallel signal transmission device

In a synchronous transfer mode/asynchronous transfer mode converting transmission path terminating apparatus, a receive synchronous transfer mode processing unit has an out of synchronization detecting unit for detecting out of synchronization information, and an asynchronous transfer mode cell extracting unit has an asynchronous transfer mode cell synchronizing unit for forcibly outputting a signal representing out of synchronization when receiving the out of synchronization information from the out of synchronization detecting unit, an asynchronous transfer mode cell discard judging unit for forcibly outputting a cell discard signal when receiving the out of synchronization information from the out of synchronization detecting unit, and a storage write controlling unit for forcibly inhibiting an asynchronous transfer mode cell from being written in a storage unit when receiving the out of synchronization information from the out of synchronization detecting unit, thereby always capturing accurate data (cells) to continue a process even immediately after generation of an alarm such as an SEF signal, besides transferring error information used to accurately switch a transmission path so as to prevent unnecessary switching of the transmission path.

Synchronous transfer mode/asynchronous transfer mode converting

Growing community of inventors

Kanagawa, Japan

Hiroyuki Shimono